公开(公告)号：US20230132272A1

公开(公告)日：2023-04-27

申请号：US17870898

申请日：2022-07-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUN YOUNG OH ,  UN-BYOUNG KANG ,  BYEONGCHAN KIM ,  JUMYONG PARK ,  CHUNGSUN LEE

IPC: H01L23/00 ,  H01L25/065

Abstract: The semiconductor device may include a substrate, a first insulating layer on a bottom surface of the substrate, an interconnection structure in the first insulating layer, a second insulating layer on a bottom surface of the first insulating layer, and a plurality of lower pads provided in the second insulating layer. Each lower pad may be provided such a width of a top surface thereof is smaller than a width of a bottom surface thereof. The lower pads may include first, second, and third lower pads. In a plan view, the first and third lower pads may be adjacent to center and edge portions of the substrate, respectively, and the second lower pad may be disposed therebetween. A width of a bottom surface of the second lower pad may be smaller than that of the first lower pad and may be larger than that of the third lower pad.