公开(公告)号：US20200075730A1

公开(公告)日：2020-03-05

申请号：US16353750

申请日：2019-03-14

Applicant: Samsung Electronics Co., Ltd

Inventor： Dong Kak Lee ,  Min Woo KIM ,  Bong Hyun KIM ,  Hee Young PARK ,  Seo Jin AHN ,  Won Yong LEE

IPC: H01L29/10 ,  H01L27/108 ,  H01L21/762

Abstract: A semiconductor device includes a trench defining an active region in a substrate, a first insulating layer on a bottom surface and side surfaces of the active region inside the trench, a shielding layer on a surface of the first insulating layer, the shielding layer including a plurality of spaced apart particles, a second insulating layer on the shielding layer and having first charge trapped therein, the plurality of spaced apart particles being configured to concentrate second charge having an opposite polarity to the charge trapped in the second insulating layer, and a gap-fill insulating layer on the second insulating layer in the trench.

公开(公告)号：US20240114679A1

公开(公告)日：2024-04-04

申请号：US18538358

申请日：2023-12-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Won MA ,  Ja Min KOO ,  Dae Young MOON ,  Kyu Wan KIM ,  Bong Hyun KIM ,  Young Seok KIM

IPC: H10B12/00

CPC classification number: H10B12/485 ,  H10B12/37

Abstract: A semiconductor memory device includes a substrate including an element separation film and an active region defined by the element separation film, a bit line structure on the substrate, a trench in the element separation film and the active region, the trench on at least one side of the bit line structure and including a first portion in the element separation film and a second portion in the active region, a bottom face of the first portion placed above a bottom face of the second portion, a single crystal storage contact filling the trench, and an information storage element electrically connected to the single crystal storage contact.

公开(公告)号：US20220037335A1

公开(公告)日：2022-02-03

申请号：US17355451

申请日：2021-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Won MA ,  Ja Min KOO ,  Dae Young MOON ,  Kyu Wan KIM ,  Bong Hyun KIM ,  Young Seok KIM

IPC: H01L27/108

Abstract: A semiconductor memory device includes a substrate including an element separation film and an active region defined by the element separation film, a bit line structure on the substrate, a trench in the element separation film and the active region, the trench on at least one side of the bit line structure and including a first portion in the element separation film and a second portion in the active region, a bottom face of the first portion placed above a bottom face of the second portion, a single crystal storage contact filling the trench, and an information storage element electrically connected to the single crystal storage contact.