公开(公告)号：US20230337443A1

公开(公告)日：2023-10-19

申请号：US18126761

申请日：2023-03-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho Young TANG ,  Tae-Hyung KIM ,  Dae Young MOON ,  Sang-Yeop BAECK ,  Dong-Wook SEO

IPC: H10B80/00 ,  H10B10/00

CPC classification number: H10B80/00 ,  H10B10/18

Abstract: Provided are a three-dimensional (3D) semiconductor integrated circuit and a static random access memory (SRAM) device. The three-dimensional (3D) semiconductor integrated circuit includes: a first die including a power supply circuit a second die including an SRAM with a through-silicon-via (TSV) bundle region; a third die including a processor; and TSVs, each of which is provided on the TSV bundle region and extends from the TSV bundle region to the third die. The SRAM device includes: a bank array with banks, each of which includes sub-bit-cell arrays and a local peripheral circuit region arranged in a cross (+) shape between the sub-bit-cell arrays; and a global peripheral circuit region including a tail peripheral circuit region extending in a first direction and a head peripheral circuit region extending in a second direction, the tail peripheral circuit region and the head peripheral circuit region being arranged in a “T” shape.

公开(公告)号：US20240114679A1

公开(公告)日：2024-04-04

申请号：US18538358

申请日：2023-12-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Won MA ,  Ja Min KOO ,  Dae Young MOON ,  Kyu Wan KIM ,  Bong Hyun KIM ,  Young Seok KIM

IPC: H10B12/00

CPC classification number: H10B12/485 ,  H10B12/37

Abstract: A semiconductor memory device includes a substrate including an element separation film and an active region defined by the element separation film, a bit line structure on the substrate, a trench in the element separation film and the active region, the trench on at least one side of the bit line structure and including a first portion in the element separation film and a second portion in the active region, a bottom face of the first portion placed above a bottom face of the second portion, a single crystal storage contact filling the trench, and an information storage element electrically connected to the single crystal storage contact.

公开(公告)号：US20220037335A1

公开(公告)日：2022-02-03

申请号：US17355451

申请日：2021-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Won MA ,  Ja Min KOO ,  Dae Young MOON ,  Kyu Wan KIM ,  Bong Hyun KIM ,  Young Seok KIM

IPC: H01L27/108

Abstract: A semiconductor memory device includes a substrate including an element separation film and an active region defined by the element separation film, a bit line structure on the substrate, a trench in the element separation film and the active region, the trench on at least one side of the bit line structure and including a first portion in the element separation film and a second portion in the active region, a bottom face of the first portion placed above a bottom face of the second portion, a single crystal storage contact filling the trench, and an information storage element electrically connected to the single crystal storage contact.