公开(公告)号：US11995148B2

公开(公告)日：2024-05-28

申请号：US17108342

申请日：2020-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngrae Cho ,  Kiseok Kwon ,  Chulsoo Park ,  Jongho Kim ,  Jaeun Park

IPC: G06F17/15 ,  G06F9/345 ,  G06F12/08 ,  G06N3/084

CPC classification number: G06F17/153 ,  G06F9/3455 ,  G06F12/08 ,  G06N3/084

Abstract: Disclosed is an electronic apparatus including a processor configured to obtain calculation information based on input data of a deconvolution calculation being input, obtain a size of output data based on the obtained calculation information, obtain a plurality of memory address values corresponding to a size of the output data using an address generation module, perform convolution calculation based on the calculation information using a convolution calculation module to obtain an intermediate value in the convolution calculation process, obtain a memory address value corresponding to the obtained intermediate value of the plurality of obtained memory addresses using the address generation module, store the obtained intermediate value in the memory address value corresponding to the intermediate value, accumulate at least one intermediate value based on the memory address value corresponding to the intermediate value using a cumulative calculation module, and obtain a deconvolution calculation value with respect to the input data based on the accumulated at least one intermediate value.

公开(公告)号：US20240428059A1

公开(公告)日：2024-12-26

申请号：US18647814

申请日：2024-04-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jonghun Lee ,  Chulsoo Park ,  Cheolgyu Jin

IPC: G06N3/063 ,  G06N3/048

Abstract: An electronic device includes: a neural processing unit (NPU) configured to process an activation function; and an accelerator in the NPU, wherein the accelerator includes: a function processing block including at least one sub-operation block, and a final output block connected to the function processing block, wherein the at least one sub-operation block includes: a first sub-operation block configured to calculate an approximation output value for the activation function by processing the activation function based on a first point number and a first bit resolution, and a second sub-operation block configured to calculate a detailed output value for the activation function by processing the activation function based on a second point number and a second bit resolution, and wherein the final output block is configured to calculate a final output value corresponding to the activation function based on the approximation output value and the detailed output value.