公开(公告)号：US20180158799A1

公开(公告)日：2018-06-07

申请号：US15656071

申请日：2017-07-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae-hoon NA ,  Hyun-jin KIM ,  Jang-woo LEE

IPC: H01L25/065 ,  H01L21/66 ,  G11C16/26 ,  G11C16/22 ,  G11C16/10

Abstract: A multi-chip package capable of testing internal signal lines including a printed circuit board, a first semiconductor chip mounted on the printed circuit board and including a test circuit, and second semiconductor chips mounted on the printed circuit board and electrically connected to the first semiconductor chip via a plurality of internal signal lines may be provided. The test circuit may be configured to enable circuits of the first semiconductor chip connected to pads contacting the plurality of internal signal lines, transmit complementary data to at least two pads from among the pads, and form a current path in the circuits connected to the at least two pads, thereby detecting a short-circuit between the internal bonding wires.