公开(公告)号：US20230163073A1

公开(公告)日：2023-05-25

申请号：US17576007

申请日：2022-01-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： GILHWAN SON ,  HOONSEOK SEO ,  SAEHAN PARK ,  BYOUNGHAK HONG ,  KANG-ILL SEO

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/535

CPC classification number: H01L23/5286 ,  H01L21/76898 ,  H01L23/535

Abstract: Methods of forming an integrated circuit devices may include forming a transistor on a first surface of a substrate. The transistor may include an active region, a source/drain region contacting the active region and a gate electrode on the active region. The methods may also include forming a conductive wire that is electrically connected to the source/drain region, forming a trench extending through the substrate by etching a second surface of the substrate, which is opposite the first surface of the substrate, and forming a power rail in the trench. The power rail is electrically connected to conductive wire.

公开(公告)号：US20220336353A1

公开(公告)日：2022-10-20

申请号：US17849836

申请日：2022-06-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： TAEYONG BAE ,  HOONSEOK SEO

IPC: H01L23/528 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

Abstract: Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a first insulating layer and a plurality of metal wires on the first insulating layer. The plurality of metal wires may include a first metal wire including a first upper surface and a first lower surface that faces the first insulating layer and a second metal wire including a second upper surface and a second lower surface that faces the first insulating layer and is coplanar with the first lower surface. The first metal wire may have a first width monotonically decreasing from the first lower surface to the first upper surface, and the second metal wire may have a second width monotonically increasing from the second lower surface to the second upper surface.