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    Semiconductor devices
    1.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11189615B2

    公开(公告)日：2021-11-30

    申请号：US16739357

    申请日：2020-01-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seung Soo Hong ,  Jeong Yun Lee ,  Geum Jung Seong ,  Jin Won Lee ,  Hyun Ho Jung

    IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L27/088 ,  H01L27/02 ,  H01L21/8234 ,  H01L27/11

    Abstract: A semiconductor device including a plurality of active regions extending in a first direction on a substrate; a device isolation layer between the plurality of active regions such that upper portions of the plurality of active regions protrude from the device isolation layer; a first gate electrode and a second gate electrode extending in a second direction crossing the first direction and intersecting the plurality of active regions, respectively, on the substrate, the first gate electrode being spaced apart from the second gate electrode in the second direction; a first gate separation layer between the first gate electrode and the second gate electrode; and a second gate separation layer under the first gate separation layer and between the first gate electrode and the second gate electrode, the second gate separation layer extending into the device isolation layer in a third direction crossing the first direction and the second direction.

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220376046A1

    公开(公告)日：2022-11-24

    申请号：US17648155

    申请日：2022-01-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Cheol Kim ,  Jeong Yeon Seo ,  Dong Kwon Kim ,  Hyun Ho Jung

    IPC: H01L29/06

    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first active pattern, which extends in a first direction on the substrate, a second active pattern, which extends in the first direction on the substrate and is spaced apart from the first active pattern by a first pitch in a second direction different from the first horizontal direction, a third active pattern, which extends in the first direction on the substrate and is spaced apart from the second active pattern by a second pitch greater than the first pitch in the second direction, a field insulating layer, which borders side walls of each of the first to third active patterns, a dam, which is between the first active pattern and the second active pattern on the field insulating layer, the region between the second active pattern and the third active pattern being free of the dam, a gate electrode, which extends in the second direction, and has a first portion on the first active pattern, a second portion on the second active pattern, and a third portion on the third active pattern, a first work function layer between the first portion of the gate electrode and the dam, and a second work function layer between the second portion of the gate electrode and the dam.

    SEMICONDUCTOR DEVICES
    3.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20230031542A1

    公开(公告)日：2023-02-02

    申请号：US17716278

    申请日：2022-04-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyun Ho Jung ,  Dong Kwon Kim ,  Cheol Kim

    IPC: H01L29/06 ,  H01L29/66

    Abstract: A semiconductor device includes: a substrate; an active pattern and a field insulating layer surrounding a sidewall of the active pattern on the substrate; first and second gate electrodes on the active pattern and extending in a direction different from that of the active pattern; an interlayer insulating layer surrounding a sidewall of each of the first and second gate electrodes; a gate spacer on opposing sidewalls of each of the first and second gate electrodes that includes a first sidewall and a second sidewall opposite the first sidewall in the first horizontal direction, each of which contacts the interlayer insulating layer; and a first gate cut dividing the second gate electrode into two portions, wherein the first gate cut includes a same material as the gate spacer; and wherein a first width of the first gate cut is smaller than a second width of the gate spacer.

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