公开(公告)号：US11768702B2

公开(公告)日：2023-09-26

申请号：US17112008

申请日：2020-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunchul Seok ,  Choonghoon Park ,  Byungsoo Kwon ,  Bumgyu Park ,  Jonglae Park ,  Junhwa Seo ,  Youngcheol Shin ,  Youngtae Lee

IPC: G06F9/48 ,  G06F9/38 ,  G06F9/50 ,  G06F9/54

CPC classification number: G06F9/4881 ,  G06F9/3836 ,  G06F9/3877 ,  G06F9/50 ,  G06F9/505 ,  G06F9/5005 ,  G06F9/5027 ,  G06F9/5033 ,  G06F9/541 ,  G06F9/4893

Abstract: An apparatus and a method for scheduling a task in an electronic device including a heterogeneous multi-processor are provided. The electronic device includes a memory and a processor operatively connected to the memory and including a plurality of heterogeneous cores. The processor may be configured to identify, when a task to be scheduled occurs, a scheduling group having the task among a plurality of predefined scheduling groups, and to perform scheduling for the task, based on the identified scheduling group having the task and a priority of the task.

公开(公告)号：US11941435B2

公开(公告)日：2024-03-26

申请号：US17168463

申请日：2021-02-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiljae Kim ,  Byungsoo Kwon ,  Younghun Kim ,  Jaeho Kim ,  Hyunchul Seok ,  Daehyun Cho ,  Wonseo Choi

IPC: G06F9/48

CPC classification number: G06F9/4881

Abstract: Disclosed is an electronic device including at least one processor, and a memory operatively coupled to the at least one processor. The memory stores instructions configured to enable the at least one processor to identify, in response to running of an application, a plurality of tasks related to a running operation of the application, allocate virtual runtimes to the plurality of tasks when scheduling, adjust the virtual runtime of at least one task to be run with priority among the plurality of tasks to be a minimum value, arrange the at least one task with the adjusted virtual runtime, and run the at least one task with priority according to an arrangement order.

公开(公告)号：US12265835B2

公开(公告)日：2025-04-01

申请号：US18322919

申请日：2023-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinshik Bae ,  Kwanjin Jung ,  Hyunchul Seok ,  Daehyun Cho ,  Hanju Bae ,  Mooyoung Kim ,  Minjung Kim

IPC: G06F9/451 ,  G06F1/16

Abstract: An electronic device may include: a housing including a first housing and a second housing movable with respect to the first housing; a flexible display in which a display area for displaying a screen is expanded or reduced as the second housing moves with respect to the first housing; a memory; and a processor, wherein the processor is configured to: identify a change in the size of the display area on the basis of the movement of the second housing relative to the first housing; determine an application to be preloaded from among a plurality of applications on the basis of the identified size of the display area; load, into the memory, a preload process including some of resources for executing the determined application to be preloaded; and, in response to the occurrence of an event associated with the execution of the application to be preloaded, load an activity for the execution of the application by using the loaded preload process.

公开(公告)号：US20210081027A1

公开(公告)日：2021-03-18

申请号：US16861383

申请日：2020-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jonglae Park ,  Youngtae Lee ,  Choonghoon Park ,  Hyunchul Seok ,  Kwanjin Jung

IPC: G06F1/3296 ,  G06F1/324

Abstract: Dynamic voltage and frequency scaling (DVFS) is performed based on a power step by setting a plurality of power levels corresponding to a plurality of available frequencies of a clock signal for an operation of a processor, setting a plurality of power steps corresponding to the plurality of available frequencies, and controlling a conversion between the plurality of power levels based on a utilization of the processor and the plurality of power steps. Performance and power consumption of a processor are controlled efficiently by performing power level conversion based on the power step.

公开(公告)号：US11797346B2

公开(公告)日：2023-10-24

申请号：US17106491

申请日：2020-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinshik Bae ,  Hongcheol Sim ,  Kiljae Kim ,  Jaeho Kim ,  Hyunchul Seok ,  Youngcheol Sin ,  Wonseo Choi

IPC: G06F9/50 ,  G09G5/36 ,  G06T1/20 ,  G06F9/30

CPC classification number: G06F9/5027 ,  G06F9/3009 ,  G06T1/20 ,  G09G5/363

Abstract: An electronic device and a method of operating an electronic device are provided. The electronic device includes a memory, a display, and a processor including a plurality of cores generating a plurality of frames including a first frame and a second frame, wherein the processor is configured to identify a first time spent for generating the first frame to be displayed on the display and a second time corresponding to a frame rate of the display, determine whether to perform an operation of controlling the plurality of cores for reducing a time for generating the second frame, based on a result of comparison between the first time and the second time, determine a size of a load for processing a thread related to generation of the second frame, based on a ratio between the first time and the second time, in response to the determination to perform the operation of controlling the cores, allocate at least one of the plurality of cores as cores to process the thread, based on the determined size of the load, determine an operation frequency of the cores, based on the determined size of the load, and control the cores to generate the second frame according to the determined operation frequency.

公开(公告)号：US11243604B2

公开(公告)日：2022-02-08

申请号：US16861383

申请日：2020-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jonglae Park ,  Youngtae Lee ,  Choonghoon Park ,  Hyunchul Seok ,  Kwanjin Jung

IPC: G06F1/00 ,  G06F1/3296 ,  G06F1/324

Abstract: Dynamic voltage and frequency scaling (DVFS) is performed based on a power step by setting a plurality of power levels corresponding to a plurality of available frequencies of a clock signal for an operation of a processor, setting a plurality of power steps corresponding to the plurality of available frequencies, and controlling a conversion between the plurality of power levels based on a utilization of the processor and the plurality of power steps. Performance and power consumption of a processor are controlled efficiently by performing power level conversion based on the power step.