公开(公告)号：US20210118582A1

公开(公告)日：2021-04-22

申请号：US17073099

申请日：2020-10-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoonju LEE ,  Jaeyong SHIN ,  Chaigil LIM

IPC: G16Y40/30 ,  G10L15/26 ,  G16Y20/10 ,  G16Y20/20

Abstract: A server that supports an operation of an IoT environment a communication circuit and a processor. The processor is electrically connected with the communication circuit. The processor is configured to receive a sound signal corresponding to an utterance input of a user from a first electronic device through the communication circuit. The processor is configured to derive identification information and a control command of an IoT device from the sound signal. The processor is configured to determine whether it is possible to control the IoT device by using the first electronic device. The processor is configured to transmit a control signal corresponding to the control command to a second electronic device associated with the IoT device based on a result of the determination indicating the second electronic device is to use a specified wavelength to control the IoT device.

公开(公告)号：US20250061262A1

公开(公告)日：2025-02-20

申请号：US18935822

申请日：2024-11-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joonnyung LEE ,  Yeongjun KWON ,  Jaeyong SHIN ,  Jeonghoon AHN ,  Yunki CHOI

IPC: G06F30/3953 ,  H01L23/528

Abstract: A method of designing an interconnect structure of a semiconductor apparatus is provided. The interconnect structure includes interconnection layers sequentially stacked on a semiconductor substrate, and each of the interconnection includes dummy metal patterns and main metal patterns. The method includes: determining a layout of the main metal patterns included in each of the plurality of interconnection layers; determining a number of interconnection layers in the plurality of interconnection layers; and determining a layout of the dummy metal patterns included in each of the plurality of interconnection layers based on the determined layout of the main metal patterns and the determined number of interconnection layers.