公开(公告)号：US20220108962A1

公开(公告)日：2022-04-07

申请号：US17551548

申请日：2021-12-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-gi JIN ,  Nae-in LEE ,  Jum-yong PARK ,  Jin-ho CHUN ,  Seong-min SON ,  Ho-Jin LEE

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L25/10

Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.