公开(公告)号：US12230573B2

公开(公告)日：2025-02-18

申请号：US17713559

申请日：2022-04-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seyong Oh ,  Kihyun Kim ,  Jihwan You

IPC: H01L23/535 ,  H10B43/27 ,  H10B43/40

Abstract: A semiconductor device and a data storage system including the same are provided. The semiconductor device includes a lower structure including a semiconductor substrate, a circuit element on the semiconductor substrate, a circuit interconnection structure on the semiconductor substrate, the circuit interconnection structure including a plurality of connection patterns on different levels and electrically connected to the circuit element, and a lower insulating structure covering the circuit element and the circuit interconnection structure; and an upper structure including an upper substrate in contact with an upper surface of the lower insulating structure, a stack structure on the upper substrate, the stack structure including interlayer insulating layers and gate electrodes alternately stacked in a vertical direction, and a vertical memory structure penetrating through the stack structure in the vertical direction.

公开(公告)号：US11922298B2

公开(公告)日：2024-03-05

申请号：US16858823

申请日：2020-04-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinhong Park ,  Sungjun Kim ,  Keun Heo ,  Hyeongjun Kim ,  Seyong Oh

IPC: G06N3/065 ,  G11C11/54

CPC classification number: G06N3/065 ,  G11C11/54

Abstract: A neuron device is described. The neuron device is based on spontaneous polarization switching which includes a plurality of gate electrodes, a plurality of drain electrodes, a plurality of source lines, a dielectric layer, and a semiconductor layer. The gate electrodes are arranged parallel to each other. The drain electrodes are arranged parallel to each other. The source lines are arranged between the gate electrodes and the drain electrodes and parallel to each other. The dielectric layer is formed at intersections between the gate electrodes and the source lines. The semiconductor layer is formed at intersections between the drain electrodes and the source electrodes. The drain electrodes function as synapse-after-neuron linking terminals. The gate electrodes adjust an arrangement direction of electrical dipoles of the dielectric layer to control a firing time point and a firing height of the neuron device.