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公开(公告)号:US11934669B2
公开(公告)日:2024-03-19
申请号:US16942641
申请日:2020-07-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dimin Niu , Shuangchen Li , Bob Brennan , Krishna T. Malladi , Hongzhong Zheng
IPC: G06F3/06 , G06F15/78 , G11C11/4096
CPC classification number: G06F3/0631 , G06F3/0604 , G06F3/067 , G06F15/7821 , G11C11/4096
Abstract: A processor includes a plurality of memory units, each of the memory units including a plurality of memory cells, wherein each of the memory units is configurable to operate as memory, as a computation unit, or as a hybrid memory-computation unit.
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公开(公告)号:US20180121120A1
公开(公告)日:2018-05-03
申请号:US15595887
申请日:2017-05-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dimin Niu , Shuangchen Li , Bob Brennan , Krishna T. Malladi , Hongzhong Zheng
IPC: G06F3/06 , G11C11/4096
CPC classification number: G06F3/0631 , G06F3/0604 , G06F3/067 , G06F15/7821 , G11C11/4096
Abstract: A processor includes a plurality of memory units, each of the memory units including a plurality of memory cells, wherein each of the memory units is configurable to operate as memory, as a computation unit, or as a hybrid memory-computation unit.
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公开(公告)号:US20240211149A1
公开(公告)日:2024-06-27
申请号:US18593885
申请日:2024-03-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dimin Niu , Shuangchen Li , Bob Brennan , Krishna T. Malladi , Hongzhong Zheng
IPC: G06F3/06 , G06F15/78 , G11C11/4096
CPC classification number: G06F3/0631 , G06F3/0604 , G06F3/067 , G06F15/7821 , G11C11/4096
Abstract: A processor includes a plurality of memory units, each of the memory units including a plurality of memory cells, wherein each of the memory units is configurable to operate as memory, as a computation unit, or as a hybrid memory-computation unit.
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公开(公告)号:US10732866B2
公开(公告)日:2020-08-04
申请号:US15595887
申请日:2017-05-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dimin Niu , Shuangchen Li , Bob Brennan , Krishna T. Malladi , Hongzhong Zheng
IPC: G06F3/06 , G11C11/4096 , G06F15/78
Abstract: A processor includes a plurality of memory units, each of the memory units including a plurality of memory cells, wherein each of the memory units is configurable to operate as memory, as a computation unit, or as a hybrid memory-computation unit.
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