公开(公告)号：US20220077043A1

公开(公告)日：2022-03-10

申请号：US17306988

申请日：2021-05-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： GYUHO KANG ,  SEONG-HOON BAE ,  JIN HO AN ,  TEAHWA JEONG ,  JU-IL CHOI ,  ATSUSHI FUJISAKI

IPC: H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L23/00

Abstract: A semiconductor package includes; a redistribution substrate including a redistribution pattern, a semiconductor chip mounted on a top surface of the redistribution substrate, and a connection terminal between the semiconductor chip and the redistribution substrate. The redistribution substrate further includes; a pad structure including a pad interconnection and a pad via, disposed between the redistribution pattern and the connection terminal, wherein the pad structure is electrically connected to the redistribution pattern and a top surface of the pad structure contacts the connection terminal, a shaped insulating pattern disposed on a top surface of the redistribution pattern, and a pad seed pattern disposed on the redistribution pattern and covering the shaped insulating pattern.

公开(公告)号：US20210090984A1

公开(公告)日：2021-03-25

申请号：US16830361

申请日：2020-03-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： JINHO CHUN ,  JIN HO AN ,  TEAHWA JEONG ,  JEONGGI JIN ,  JU-IL CHOI ,  ATSUSHI FUJISAKI

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48

Abstract: There are provided semiconductor packages including a redistribution substrate and a semiconductor chip mounted on the redistribution substrate. The redistribution substrate may include a lower protective layer, a first conductive pattern disposed on the lower protective layer, a first insulating layer surrounding the first conductive pattern and disposed on the lower protective layer, and a second insulating layer disposed on the first insulating layer. The first insulating layer may include a first upper surface that includes a first flat portion extending parallel to an upper surface of the lower protective layer, and a first recess facing the lower protective layer and in contact with the first conductive pattern. The first recess may be directly connected to the first conductive pattern.