公开(公告)号：US20230328956A1

公开(公告)日：2023-10-12

申请号：US17936960

申请日：2022-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jihye Son ,  Hojoong Kim ,  Youngsin Kim ,  Hyo-Seok Kim ,  Bongsik Choi ,  Taewoong Koo ,  Taeha Suh

IPC: H01L27/108

CPC classification number: H01L27/10894 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10897

Abstract: A semiconductor device includes a substrate including a first active pattern having first and second source/drain regions of a cell region, a device isolation layer in a trench defining the first active pattern on the cell region, a buffer layer on the cell region, a line structure extends in a third direction, extends from the cell region to a boundary region, and including a first conductive pattern that passes through the buffer layer and contacts the first source/drain region, a bit line on the first conductive pattern, and a first barrier pattern between the bit line and the first conductive pattern, a pair of spacers respectively on both sidewalls of the line structure, a contact on the second source/drain region, a landing pad on the contact, a first abrasive particle between the contact and the landing pad, and a data storage element on the landing pad.