公开(公告)号：US20160141243A1

公开(公告)日：2016-05-19

申请号：US14712136

申请日：2015-05-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun YOU ,  Wei-Hua HSU ,  Choong-Ho LEE ,  Hyung-Jong LEE

IPC: H01L23/522 ,  H01L27/088 ,  H01L23/535 ,  H01L27/092

CPC classification number: H01L23/5226 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/088 ,  H01L27/0883 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a substrate including a first region and a second region, a first transistor and a second transistor formed on the first region and the second region, respectively, a first contact formed on the first transistor, and a second contact formed on the second transistor. The first contact includes a first work function control layer having a first thickness and a first conductive layer formed on the first work function control layer, the second contact includes a second work function control layer having a second thickness different from the first thickness and a second conductive layer formed on the second work function control layer, and the first contact and the second contact have different work functions.

Abstract translation: 提供半导体器件及其制造方法。 该半导体器件包括分别包括第一区域和第二区域的基板，分别形成在第一区域和第二区域上的第一晶体管和第二晶体管，形成在第一晶体管上的第一触点和形成在第一晶体管上的第二触点 第二晶体管。 第一触点包括具有第一厚度的第一功函数控制层和形成在第一功函数控制层上的第一导电层，第二触点包括具有不同于第一厚度的第二厚度的第二功函数控制层， 导电层形成在第二功函数控制层上，第一触点和第二触点具有不同的功能。

公开(公告)号：US20150162331A1

公开(公告)日：2015-06-11

申请号：US14326471

申请日：2014-07-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae-Lim KANG ,  Min-Ho KWON ,  Wei-Hua HSU ,  Sang-Hyun WOO ,  Hwa-Sung RHEE ,  Jun-Suk CHOI

IPC: H01L27/088 ,  H01L21/66

CPC classification number: H01L22/34 ,  H01L27/0886

Abstract: A test pattern of a semiconductor device is provided, which includes first and second fins formed to project from a substrate and arranged to be spaced apart from each other, first and second gate structures formed to cross the first and second fins, respectively, a first source region and a first drain region arranged on the first fin on one side and the other side of the first gate structure, a second source region and a second drain region arranged on the second fin on one side and the other side of the second gate structure, a first conductive pattern connected to the first and second drain regions to apply a first voltage to the first and second drain regions and a second conductive pattern connecting the first source region and the second gate structure to each other.

Abstract translation: 提供了一种半导体器件的测试图案，其包括形成为从衬底突出并布置成彼此间隔开的第一和第二鳍片，分别形成为跨越第一和第二鳍片的第一和第二栅极结构，第一和第二鳍片 源极区域和布置在第一鳍片的第一栅极结构的一侧和另一侧上的第一漏极区域，在第二栅极的一侧和另一侧上布置在第二鳍片上的第二源极区域和第二漏极区域 结构，连接到第一和第二漏极区域以将第一电压施加到第一和第二漏极区域的第一导电图案以及将第一源极区域和第二栅极结构彼此连接的第二导电图案。