MEMORY DEVICES WITH THREE-DIMENSIONAL STRUCTURE

    公开(公告)号:US20210005593A1

    公开(公告)日:2021-01-07

    申请号:US17025300

    申请日:2020-09-18

    Abstract: A memory device includes a peripheral circuit layer, a first memory layer provided on the peripheral circuit layer, an inter-metal layer provided on the first memory layer, and a second memory layer provided on the inter-metal layer. The peripheral circuit layer includes a first substrate and a peripheral circuit provided on the first substrate. The first memory layer includes a first memory structure electrically connected to the peripheral circuit through metal bonding pads. The inter-metal layer includes intermediate pads electrically connected to the peripheral circuit through metal bonding pads. The second memory layer includes a second memory structure electrically connected with the intermediate pads and a second substrate provided on the second memory structure. The peripheral circuit, the first memory structure, and the second structure are provided between the first substrate and the second substrate.

    MEMORY DEVICES WITH THREE-DIMENSIONAL STRUCTURE

    公开(公告)号:US20190189632A1

    公开(公告)日:2019-06-20

    申请号:US16030170

    申请日:2018-07-09

    Abstract: A memory device includes a substrate, a first memory structure including a plurality of first word lines stacked on the substrate in a direction perpendicular to a top surface of the substrate, an inter-metal layer on the first memory structure and including a plurality of intermediate pads connected with separate, respective first word lines of the plurality of first word lines, a second memory structure including a plurality of second word lines stacked on the inter-metal layer in the direction perpendicular to the top surface of the substrate, and an upper metal layer on the second memory structure and including a plurality of upper pads connected with separate, respective second word lines of the plurality of second word lines.

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