公开(公告)号：US20250029896A1

公开(公告)日：2025-01-23

申请号：US18581776

申请日：2024-02-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younghun Kim

IPC: H01L23/48 ,  H01L23/528 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes an active pattern on a substrate, the active pattern extending in a first direction parallel to an upper surface of the substrate; a gate structure on the active pattern, the gate structure extending in a second direction parallel to the upper surface of the substrate and crossing the first direction; channels spaced apart from each other in a vertical direction, each of the channels extending through the gate structure; a through contact extending through the substrate and the active pattern in the vertical direction, an upper portion and a lower portion of the through contact connected to each other and formed of the same material; a lower wiring on a back side of the substrate, the lower wiring electrically connected to the through contact; and an upper wiring disposed on a front side of the substrate, the upper wiring electrically connected to the upper wiring.

公开(公告)号：US12061514B2

公开(公告)日：2024-08-13

申请号：US17643526

申请日：2021-12-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Younghun Kim ,  Kyungrae Kim ,  Min Sang Park ,  Junhyun Bae ,  Junchul Shin ,  Younghoon Lee

IPC: G06F1/3296 ,  G01R19/00 ,  G01R22/06 ,  G01R23/16 ,  G06F1/324 ,  H02M3/158

CPC classification number: G06F1/3296 ,  G06F1/324

Abstract: A power management integrated circuit (PMIC) includes voltage regulators, a conversion circuit, a measurement cycle controller, an oscillator, and a control logic. The voltage regulators generate regulator voltages. The conversion circuit converts analog signals indicating load currents of the voltage regulators to generate digital signals corresponding to the load currents. The measurement cycle controller operates in response to a first clock signal having a first frequency and generates an oscillation enable signal that is activated during a measurement period. The oscillator generates a second clock signal having a second frequency higher than the first frequency in response to the oscillation enable signal. The control logic operates in response to the second clock signal and generates power information, indicating power consumed by the load currents during the measurement period, using the digital signals.

公开(公告)号：US11941435B2

公开(公告)日：2024-03-26

申请号：US17168463

申请日：2021-02-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiljae Kim ,  Byungsoo Kwon ,  Younghun Kim ,  Jaeho Kim ,  Hyunchul Seok ,  Daehyun Cho ,  Wonseo Choi

IPC: G06F9/48

CPC classification number: G06F9/4881

Abstract: Disclosed is an electronic device including at least one processor, and a memory operatively coupled to the at least one processor. The memory stores instructions configured to enable the at least one processor to identify, in response to running of an application, a plurality of tasks related to a running operation of the application, allocate virtual runtimes to the plurality of tasks when scheduling, adjust the virtual runtime of at least one task to be run with priority among the plurality of tasks to be a minimum value, arrange the at least one task with the adjusted virtual runtime, and run the at least one task with priority according to an arrangement order.