公开(公告)号：US10459477B2

公开(公告)日：2019-10-29

申请号：US15491654

申请日：2017-04-19

Applicant: Seagate Technology, LLC

Inventor： Bruce D. Buch ,  Nicholas P. Mati ,  Matthew D. Rench

IPC: G06F21/55 ,  G06F1/08 ,  G06F21/75

Abstract: A computing system can be arranged to generate a range of different frequencies with at least one oscillator of a clock module prior to providing a first clock frequency to a controller with a channel selector of the clock module in response to a dither control circuit. A system operation may be executed with the controller before the first clock frequency is changed to a second clock frequency during the execution of the system operation as directed by the dither control circuit. The second clock frequency can be chosen from the range of different frequencies.The computing system may return to the first clock frequency at the conclusion of the execution of the system operation.

公开(公告)号：US20180307835A1

公开(公告)日：2018-10-25

申请号：US15491654

申请日：2017-04-19

Applicant: Seagate Technology, LLC

Inventor： Bruce D. Buch ,  Nicholas P. Mati ,  Matthew D. Rench

IPC: G06F21/55 ,  G06F1/08

CPC classification number: G06F1/08 ,  G06F21/75 ,  G06F21/755 ,  G06F2221/034

Abstract: A computing system can be arranged to generate a range of different frequencies with at least one oscillator of a clock module prior to providing a first clock frequency to a controller with a channel selector of the clock module in response to a dither control circuit. A system operation may be executed with the controller before the first clock frequency is changed to a second clock frequency during the execution of the system operation as directed by the dither control circuit. The second clock frequency can be chosen from the range of different frequencies. The computing system may return to the first clock frequency at the conclusion of the execution of the system operation.