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1.
公开(公告)号:US10990292B2
公开(公告)日:2021-04-27
申请号:US16413615
申请日:2019-05-16
Applicant: Silicon Motion Inc.
Inventor: Guan-Yao Huang , Yu-Chih Lin , Chang-Wei Shen
IPC: G06F3/06
Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, the flash memory module includes a plurality of flash memory chips, the flash memory controller includes a buffer memory and a microcontroller, and the buffer memory is arranged to store an in-system programming (ISP) code. When the flash memory controller enters a power saving mode, the microcontroller disables a portion of the buffer memory to make at least one portion of the ISP code disappear; and when the flash memory controller enters a normal mode from the power saving mode, the microcontroller reads said at least one portion of the ISP code from N flash memory chips within the plurality of flash memory chips, wherein N is a positive integer greater than one.
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公开(公告)号:US10776228B2
公开(公告)日:2020-09-15
申请号:US16016089
申请日:2018-06-22
Applicant: Silicon Motion, Inc.
Inventor: Kuan-Yu Ke , Guan-Yao Huang , Shen-Ting Chiu
Abstract: A data storage device includes a flash memory, a controller and a random-access memory. The flash memory includes a plurality of planes, and each plane includes a plurality of blocks. A portion of blocks in each of the planes constitutes a super block, so that the flash memory includes a plurality of super blocks. The controller is coupled to the flash memory. When a first block of at least one first super block of the super blocks is damaged, and a second block of a second super block in the position corresponding to the damaged block is normal, the controller merges the second block of the second super block with the first super block to replace the first block. The random-access memory stores a compression table to record position information about the first block in the first super block and the number information of the second block.
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