公开(公告)号：US10763237B2

公开(公告)日：2020-09-01

申请号：US16691477

申请日：2019-11-21

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Min Lo ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Hsiang-Hua Huang

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/00

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

公开(公告)号：US20200091109A1

公开(公告)日：2020-03-19

申请号：US16691477

申请日：2019-11-21

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Min Lo ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Hsiang-Hua Huang

IPC: H01L23/00 ,  H01L21/48

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

公开(公告)号：US20190252344A1

公开(公告)日：2019-08-15

申请号：US15980255

申请日：2018-05-15

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Min Lo ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Hsiang-Hua Huang

IPC: H01L23/00 ,  H01L21/48

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

公开(公告)号：US10522500B2

公开(公告)日：2019-12-31

申请号：US15980255

申请日：2018-05-15

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Min Lo ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Hsiang-Hua Huang

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/00

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.