PROCESS FOR FABRICATING A DOUBLE SEMICONDUCTOR-ON-INSULATOR STRUCTURE

    公开(公告)号:US20250140600A1

    公开(公告)日:2025-05-01

    申请号:US18834482

    申请日:2023-01-30

    Applicant: Soitec

    Abstract: A method is used to fabricate a double semiconductor-on-insulator structure comprising, from a back side to a front side of the structure: a handle substrate, a first electrically insulating layer, a first single-crystal semiconductor layer, a second electrically insulating layer and a second single-crystal semiconductor layer. The method comprises:—a first step of formation of an oxide layer on the front and back sides of the handle substrate, to form the first electrically insulating layer and an oxide layer on the back side of the handle substrate, —a first step of layer transfer, to transfer the first single-crystal semiconductor layer, —a second step of formation of an oxide layer, to form the second electrically insulating layer, and —a second step of layer transfer, to transfer the second single-crystal semiconductor layer.

    PROCESS FOR FABRICATING A DOUBLE SEMICONDUCTOR-ON-INSULATOR STRUCTURE

    公开(公告)号:US20250140601A1

    公开(公告)日:2025-05-01

    申请号:US18834746

    申请日:2023-01-30

    Applicant: Soitec

    Abstract: A method for fabricating a double semiconductor-on-insulator structure comprising the steps of: providing a first donor substrate and a handle substrate, forming a weakened zone in the donor substrate so as to delimit a first semiconductor layer to be transferred, bonding the first donor substrate to the handle substrate, a first electrically insulating layer being at the interface, and detaching at the weakened zone, treating the surface of the first transferred semiconductor layer comprising: a rapid thermal annealing, a thermal oxidation followed by a deoxidation, a smoothing heat treatment at a temperature of above 1000° C. in a non-oxidizing atmosphere, chemical-mechanical polishing, providing a second donor substrate of a second semiconductor layer to be transferred, transferring the second semiconductor layer, a second electrically insulating layer being at the interface.

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