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公开(公告)号：US06695361B1
公开(公告)日：2004-02-24
申请号：US09822896
申请日：2001-03-30
IPC分类号： E05C306
CPC分类号： E05B85/02 , E05B17/08 , E05B77/34 , E05B85/243 , Y10S292/23 , Y10S292/53 , Y10S292/58 , Y10T292/1047 , Y10T292/1082
摘要： The latch assembly of the present invention is adapted for use on motor vehicles, such as agricultural and construction vehicles, recreation vehicles, utility and emergency vehicles, and heavy-duty trucks. The latch assembly includes a housing with a rotor and catch rotatably mounted therein for movement between open and closed positions for releasing and retaining a striker bolt on the door. Holes in the housing allow the housing to be mounted either internally or externally to the door frame. The rotor and catch are impregnated with a lubricant to minimize friction and extend the life of the latch assembly. A grease block is also provided within the housing to inhibit entry of contaminants, such as dirt, water, and the like, so as to further extend the life of the latch assembly.
摘要翻译： 本发明的闩锁组件适用于诸如农业和工程车辆，娱乐车辆，公用事业和应急车辆以及重型卡车之类的机动车辆上。 闩锁组件包括具有可旋转地安装在其中的用于在打开和关闭位置之间运动的转子和卡扣的壳体，用于释放和保持门上的撞针螺栓。 壳体中的孔允许外壳在门框内部或外部安装。 转子和止动件用润滑剂浸渍以最小化摩擦并延长闩锁组件的寿命。 壳体内还设置有油脂块，以防止诸如污物，水等的污染物进入，以进一步延长闩锁组件的使用寿命。
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2.发明授权Hardware semaphores for a multi-processor system within a shared memory architecture 有权共享内存架构中多处理器系统的硬件信号量公开(公告)号：US06892258B1
公开(公告)日：2005-05-10
申请号：US10015076
申请日：2001-10-26
CPC分类号： G06F13/1663
摘要： A circuit generally comprising a memory element and a controller. The memory element may define a semaphore allocatable to a resource. The controller may be configured to (i) present a granted status in response to a processor reading a first address while the semaphore has a free status, (ii) set the semaphore to a busy status in response to presenting the granted status, and (iii) present the busy status in response to the processor reading the first address while the semaphore has the busy status.
摘要翻译： 通常包括存储元件和控制器的电路。 存储器元件可以定义可分配给资源的信号量。 控制器可以被配置为：（i）响应于处理器读取第一地址而呈现授权状态，而信号量具有空闲状态，（ii）响应于呈现所许可的状态将信号量设置为忙状态，并且（ iii）当信号灯处于忙状态时，呈现处理器读取第一个地址的忙碌状态。
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3.发明授权公开(公告)号：US07035908B1
公开(公告)日：2006-04-25
申请号：US09915833
申请日：2001-07-26
IPC分类号： G06F15/167 , G06F12/00
CPC分类号： G06F15/167
摘要： An apparatus comprising a shared memory and a multiprocessor logic circuit. The shared memory may be configured to store data. The multiprocessor logic circuit may comprise a plurality of processors and a message circuit. The message circuit may be configured to pass messages between the processors.
摘要翻译： 一种包括共享存储器和多处理器逻辑电路的装置。 可以将共享存储器配置为存储数据。 多处理器逻辑电路可以包括多个处理器和一个消息电路。 消息电路可以被配置为在处理器之间传递消息。
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公开(公告)号：US07210063B2
公开(公告)日：2007-04-24
申请号：US10228390
申请日：2002-08-27
IPC分类号： G06F11/00
CPC分类号： G11C16/102
摘要： The invention may relate to a method of programming a programmable non-volatile device. The programmable non-volatile device may be programmed while coupled to a circuit in which the programmable non-volatile device is to be used. The method may include establishing a connection and communicating information. The connection may be established from an external device to a test interface of the circuit. The information may be communicated from the external device through the test interface, for programming the programmable non-volatile device.
摘要翻译： 本发明可以涉及一种编程可编程非易失性设备的方法。 可编程非易失性设备可以被编程，同时耦合到要使用可编程非易失性设备的电路。 该方法可以包括建立连接和传达信息。 连接可以从外部设备建立到电路的测试接口。 该信息可以通过测试接口从外部设备传送，用于对可编程非易失性设备进行编程。
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