Abstract:
A capacitive pullup, two-phase shift register formed by Pchannel enhancement mode MOS transistors is disclosed as the embodiment of the invention. As a result of the capacitive coupling, a P-type diffusion which is normally negative will go positive in some instances. This forward biases the normally reverse biased PN junction between the P-type diffusion and the N-type substrate, injecting carriers into the substrate which may be collected at any other negatively biased P-type diffusion which then functions as the collector of a bipolar transistor. This collector current may result in the loss of stored logic information. To minimize these effects, a P-type collector diffusion is disposed adjacent to each potential emitting diffusion to collect the spurious carriers injected into the substrate before they cause the loss of stored data.