公开(公告)号：US20230195984A1

公开(公告)日：2023-06-22

申请号：US17559442

申请日：2021-12-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ajoy MANDAL ,  Venkatraman RAMAKRISHNAN ,  Steven BARTLING

IPC: G06F30/3312

CPC classification number: G06F30/3312 ,  G06F2119/12

Abstract: A method for timing analysis includes receiving a physical design of an electric circuit, selecting a timing path within the electric circuit, and determining that the selected timing path includes a first logic cell implemented with a first type of transistor and a second logic cell implemented with a second type of transistor. The method further includes running a set of process corners with the first type of transistor at a given corner and the second type of transistor at a condition other than the given corner. The first type of transistor has a delay that is based on process correlation with the second type of transistor. The method also includes determining whether a timing requirement is met or not met for the selected timing path, and then reporting whether the timing requirement is met or not met.