公开(公告)号：US20250077230A1

公开(公告)日：2025-03-06

申请号：US18643336

申请日：2024-04-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Atul Lele ,  Mahesh Mehendale ,  Uri Weinrib ,  Anurag Choudhury

IPC: G06F9/30 ,  G06F9/38

Abstract: Disclosed herein are improvements to instructions and hardware for performing neural network operations. In an embodiment, a processing device includes instruction fetch circuitry, decoder circuitry, and neural network operation circuitry. The instruction fetch circuitry is configured to fetch a neural network instruction from memory that specifies an operation and a set of values that enable sub-circuits of the neural network operation circuitry for use with one or more of the operations of the group of operations and provide the neural network instruction to the decoder circuitry. The decoder circuitry is configured to cause the neural network operation circuitry to perform, based on the operation, a convolution operation using a first sub-circuit of the neural network operation circuitry and a first subset of the set of values or a batch normalization operation using a second sub-circuit of the neural network operation circuitry and a second subset of the set of values.