公开(公告)号：US11539555B2

公开(公告)日：2022-12-27

申请号：US17095869

申请日：2020-11-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abishek Manian ,  Ashwin Kottilvalappil Vijayan ,  Amit Rane ,  Ashkan Roshan Zamir

IPC: H04L25/03 ,  H03F3/45 ,  H03H17/06 ,  G11C27/02 ,  G05F1/56 ,  H03H11/04 ,  H03F3/183

Abstract: An N-tap feedforward equalizer (FFE) comprises a set of N FFE taps coupled together in parallel, a filter coupled between the (N−1)th FFE tap and the Nth FFE tap, and a summer coupled to an output of the set of N FFE taps. Each FFE tap includes a unique sample-an-hold (S/H) circuit that generates a unique time-delayed signal and a unique transconductance stage that generates a unique transconductance output based on the unique time-delayed signal. The filter causes the N-tap FFE to have the behavior of greater than N taps. In some examples, the filter is a first order high pass filter that causes coefficients greater than N to have an opposite polarity of the Nth coefficient. In some examples, the filter is a first order low pass filter that causes coefficients greater than N to have the same polarity as the Nth coefficient.

公开(公告)号：US11743080B2

公开(公告)日：2023-08-29

申请号：US17083008

申请日：2020-10-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abishek Manian ,  Amit Rane ,  Ashwin Kottilvalappil Vijayan

IPC: H04L27/01 ,  H04L25/03

CPC classification number: H04L27/01 ,  H04L25/03057 ,  H04L25/03343 ,  H04L25/03885 ,  H04L2025/0349

Abstract: A linear retimer includes an equalizer, a clock recovery circuit, a sample and hold (S/H) circuit, and a linear driver. The equalizer receives an input signal and outputs an equalized signal. The clock recovery circuit receives the equalized signal and outputs a clock signal. The S/H circuit receives the equalized signal and the clock signal and outputs a retimed signal. The linear driver receives the retimed signal and outputs a recovered signal. The S/H circuit is configured to preserve a voltage of the equalized signal in the retimed signal. In some examples, the S/H circuit is part of a linear three-tap feedforward equalizer, and the linear driver receives an output of the feedforward equalizer. The linear retimer can be placed between a transmitter and a channel or after the channel.