公开(公告)号：US20250004762A1

公开(公告)日：2025-01-02

申请号：US18344091

申请日：2023-06-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mahesh Mehendale ,  Uri Weinrib ,  Avi Berkovich

IPC: G06F9/30

Abstract: A system for accelerating binary convolution operations of a neural network includes a set of destination registers, binary convolution circuitry, a decoder coupled to the binary convolution circuitry, and instruction fetch circuitry coupled to the decoder and configured to fetch a binary convolution instruction from an associated memory. The binary convolution instruction specifies input data, weight data, and the set of destination registers for performing a binary convolution operation. The decoder receives the binary convolution instruction from the instruction fetch circuitry and causes the input data and the weight data to be provided to the binary convolution circuitry. In response, the binary convolution circuitry performs the binary convolution operation on the input data and the weight data to produce output data and stores the output data in the set of destination registers.