公开(公告)号：US20210398882A1

公开(公告)日：2021-12-23

申请号：US16904193

申请日：2020-06-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Patrick Francis Thompson ,  Christopher Daniel Manack ,  Madison Paige Koziol

IPC: H01L23/495

Abstract: A semiconductor package includes a semiconductor die with an active surface and an inactive surface, the active surface including metal pillars providing electrical connections to functional circuitry of the semiconductor die, and a backside metal layer on the inactive surface. The backside metal layer is attached to the inactive surface. The semiconductor package further includes a plurality of leads with each of the leads including an internal leadfinger portion and an exposed portion that includes a bonding portion. Distal ends of the metal pillars are in contact with and electrically coupled to the internal leadfinger portions. The backside metal layer is exposed on an outer surface of the semiconductor package. The bonding portions and the backside metal layer approximately planar to each other.

公开(公告)号：US11562949B2

公开(公告)日：2023-01-24

申请号：US16904193

申请日：2020-06-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Patrick Francis Thompson ,  Christopher Daniel Manack ,  Madison Paige Koziol

IPC: H01L23/495 ,  H01L23/34 ,  H01L23/48 ,  H01L21/00 ,  H05K7/04 ,  H05K7/18 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/28

Abstract: A semiconductor package includes a semiconductor die with an active surface and an inactive surface, the active surface including metal pillars providing electrical connections to functional circuitry of the semiconductor die, and a backside metal layer on the inactive surface. The backside metal layer is attached to the inactive surface. The semiconductor package further includes a plurality of leads with each of the leads including an internal leadfinger portion and an exposed portion that includes a bonding portion. Distal ends of the metal pillars are in contact with and electrically coupled to the internal leadfinger portions. The backside metal layer is exposed on an outer surface of the semiconductor package. The bonding portions and the backside metal layer approximately planar to each other.