公开(公告)号：US20210351688A1

公开(公告)日：2021-11-11

申请号：US17380135

申请日：2021-07-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Subhash SAHNI ,  Murugesh SUBRAMANIAM ,  Pranav SINHA

IPC: H02M1/08 ,  H03K17/284 ,  H03K17/08 ,  H02M3/157 ,  H02M3/158 ,  H02M1/38

Abstract: A circuit includes a first gate control circuit including a first time delay element and first and second logic gates. The first time delay element and first and second logic gates receive a pulse width modulation (PWM) signal. The first logic gate includes a first output and second logic gate includes a second output. The circuit also includes a second gate control circuit that includes a second time delay element and third and fourth logic gates. The second time delay element includes an input coupled to the output of the first time delay element. The third logic gate includes a third output, and the fourth logic gate includes a fourth output. A first gate driver receives a first signal from one of the first or third outputs. A second gate driver receives a second signal from one of the second or fourth outputs.

公开(公告)号：US20210099070A1

公开(公告)日：2021-04-01

申请号：US16589799

申请日：2019-10-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Subhash SAHNI ,  Murugesh SUBRAMANIAM ,  Pranav SINHA

IPC: H02M1/08 ,  H03K17/284 ,  H03K17/08 ,  H02M3/158 ,  H02M3/157

Abstract: A circuit includes a first gate control circuit including a first time delay element and first and second logic gates. The first time delay element and first and second logic gates receive a pulse width modulation (PWM) signal. The first logic gate includes a first output and second logic gate includes a second output. The circuit also includes a second gate control circuit that includes a second time delay element and third and fourth logic gates. The second time delay element includes an input coupled to the output of the first time delay element. The third logic gate includes a third output, and the fourth logic gate includes a fourth output. A first gate driver receives a first signal from one of the first or third outputs. A second gate driver receives a second signal from one of the second or fourth outputs.