公开(公告)号：US20200186160A1

公开(公告)日：2020-06-11

申请号：US16709809

申请日：2019-12-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rahul Vijay KULKARNI ,  Abhijeet Gopal GODBOLE ,  Shridhar Atmaram MORE

IPC: H03M1/10 ,  H03K5/24 ,  G01R31/40

Abstract: An integrated self-test mechanism for monitoring an analog-to-digital converter (ADC), a reference voltage (Vref) source associated with the ADC, a low-dropout regulator (LDO), or a power supply is provided. In one example, an ADC that is associated with an integrated circuit (IC) can monitor its own Vref, the voltage (VLBO) of an LDO associated with the IC, or the voltage (AVDD) provided to an electrical coupling mechanism in the IC that is coupled to a power supply associated with the IC. The ADC can generate a digital output code based, at least in part, on the Vref and one or more of the VLBO and the AVDD. The digital output code can be used to determine whether one or more of the ADC, the Vref source, the LDO, and the power supply is malfunctioning or nonoperational.

公开(公告)号：US20190222222A1

公开(公告)日：2019-07-18

申请号：US16261945

申请日：2019-01-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shridhar MORE ,  Rahul Vijay KULKARNI

IPC: H03M1/46

CPC classification number: H03M1/462 ,  H03M1/468

Abstract: An analog-to-digital converter includes an input terminal, a digital-to-analog converter, a comparator, and successive approximation circuitry. The input terminal is configured to receive a multi-bit digital threshold value from circuitry external to the analog-to-digital converter. The successive approximation circuitry is coupled to the comparator and the digital-to-analog converter. The successive approximation circuitry is configured to operate in a comparison mode and a conversion mode, and to provide the multi-bit digital threshold value to the digital-to-analog converter while operating in the comparison mode. The comparator is coupled to the digital-to-analog converter and the successive approximation circuity. The comparator is configured to output a signal that indicates whether an analog input signal exceeds an analog threshold signal corresponding to the multi-bit digital threshold value.