公开(公告)号：US20200378811A1

公开(公告)日：2020-12-03

申请号：US16883320

申请日：2020-05-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anand DABAK ,  Srinivas LINGAM

IPC: G01F1/66

Abstract: An integrated circuit includes one or more central processing unit (CPU) cores configured to cause a first ultrasonic transducer to generate ultrasonic signals into a fluid moving in a pipe and the first or a second ultrasonic transducer to receive the ultrasonic signals from the fluid. The CPU core(s) also compute a first value indicative of at least one of a standard deviation and a time correlation based on the received ultrasonic signals. The CPU core(s) further determine a second value indicative of a volume of gas bubbles in the fluid using the computed first value indicative of the at least one of the standard deviation and time correlation.

公开(公告)号：US20250109976A1

公开(公告)日：2025-04-03

申请号：US18980123

申请日：2024-12-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anand DABAK ,  Srinivas LINGAM

IPC: G01F1/66 ,  G01F1/667 ,  G01F1/7082 ,  G01F1/712 ,  G01F1/74 ,  G01N29/02 ,  G01N29/024 ,  G01N29/36 ,  G01N29/44

Abstract: An integrated circuit includes one or more central processing unit (CPU) cores configured to cause a first ultrasonic transducer to generate ultrasonic signals into a fluid moving in a pipe and the first or a second ultrasonic transducer to receive the ultrasonic signals from the fluid. The CPU core(s) also compute a first value indicative of at least one of a standard deviation and a time correlation based on the received ultrasonic signals. The CPU core(s) further determine a second value indicative of a volume of gas bubbles in the fluid using the computed first value indicative of the at least one of the standard deviation and time correlation.

公开(公告)号：US20230400336A1

公开(公告)日：2023-12-14

申请号：US18449463

申请日：2023-08-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anand DABAK ,  Srinivas LINGAM

IPC: G01F1/66 ,  G01F1/667 ,  G01N29/36 ,  G01N29/02 ,  G01N29/024 ,  G01N29/44 ,  G01F1/7082

CPC classification number: G01F1/66 ,  G01F1/667 ,  G01F1/662 ,  G01N29/36 ,  G01N29/02 ,  G01N29/024 ,  G01N29/4454 ,  G01N29/44 ,  G01F1/7082 ,  G01F1/74

Abstract: An integrated circuit includes one or more central processing unit (CPU) cores configured to cause a first ultrasonic transducer to generate ultrasonic signals into a fluid moving in a pipe and the first or a second ultrasonic transducer to receive the ultrasonic signals from the fluid. The CPU core(s) also compute a first value indicative of at least one of a standard deviation and a time correlation based on the received ultrasonic signals. The CPU core(s) further determine a second value indicative of a volume of gas bubbles in the fluid using the computed first value indicative of the at least one of the standard deviation and time correlation.

公开(公告)号：US20170272118A1

公开(公告)日：2017-09-21

申请号：US15071998

申请日：2016-03-16

Applicant: Texas Instruments Incorporated

Inventor： Srinivas LINGAM ,  Timothy Mark SCHMIDL

IPC: H04B1/7097 ,  H04B1/709

CPC classification number: H04B1/7097 ,  H04B1/707 ,  H04B1/709 ,  H04L1/1671 ,  H04L27/2082 ,  H04L27/22

Abstract: A direct sequence spread spectrum (DSSS) receiver includes an antenna, signal-to-noise ratio (SNR) estimation logic, and preamble detection logic. The antenna is configured to receive a DSSS signal. The SNR estimation logic is configured to estimate SNR of the received DSSS signal. The preamble detection logic is configured to, in response to the SNR estimate exceeding a SNR threshold value, detect a preamble sequence in the DSSS signal based on an absolute value of a sequence of correlation values. The sequence of correlation values is a complex quantity.