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公开(公告)号：US10902576B2
公开(公告)日：2021-01-26
申请号：US15497925
申请日：2017-04-26
Applicant: Texas Instruments Incorporated
Inventor： Eric Robert Trumbauer , Brant William Paquette , Vince Christian Samek , Michael Jay Jenson , David Matthew Curran , Jon Evan Button , Charles David Gordon
Abstract: A method of providing a semiconductor device and a computer-readable medium having instructions for performing the method are disclosed. The method includes receiving a first wafer defect map that defines comparison regions and identifies visual defect locations for a wafer. A format of the comparison regions is determined, with the format chosen from a group including die-to-die, partial-shot-to-partial-shot and full-shot-to-full-shot. If the comparison format is not die-to-die, mapping information is received that provides die locations within the comparison regions. A wafer layout map is provided that identifies die locations within the wafer.
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公开(公告)号：US20180047149A1
公开(公告)日：2018-02-15
申请号：US15497925
申请日：2017-04-26
Applicant: Texas Instruments Incorporated
Inventor： Eric Robert Trumbauer , Brant William Paquette , Vince Christian Samek , Michael Jay Jenson , David Matthew Curran , Jon Evan Button , Charles David Gordon
CPC classification number: G06T7/0004 , G06T7/001 , G06T7/70 , G06T2207/30148
Abstract: A method of providing a semiconductor device and a computer-readable medium having instructions for performing the method are disclosed. The method includes receiving a first wafer defect map that defines comparison regions and identifies visual defect locations for a wafer. A format of the comparison regions is determined, with the format chosen from a group including die-to-die, partial-shot-to-partial-shot and full-shot-to-full-shot. If the comparison format is not die-to-die, mapping information is received that provides die locations within the comparison regions. A wafer layout map is provided that identifies die locations within the wafer.
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