公开(公告)号：US20230005881A1

公开(公告)日：2023-01-05

申请号：US17364769

申请日：2021-06-30

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Mahmud Chowdhury ,  Hau Nguyen ,  Masamitsu Matsuura ,  Ting-Ta Yen

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L25/065

Abstract: In a described example, an apparatus includes: a first semiconductor die with a component on a first surface; a second semiconductor die mounted on a package substrate and having a third surface facing away from the package substrate; a solder seal bonded to and extending from the first surface of the first semiconductor die flip chip mounted to the third surface of the second semiconductor die, the solder seal at least partially surrounding the stress sensitive component; a first solder joint formed between the solder seal and the third surface of the second semiconductor die; a second solder joint formed between solder at an end of the post connect and the third surface of the second semiconductor die; and a mold compound covering the second surface of the first semiconductor die, a portion of the second semiconductor die, and an outside periphery of the solder seal.

公开(公告)号：US20240421120A1

公开(公告)日：2024-12-19

申请号：US18816640

申请日：2024-08-27

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Mahmud Chowdhury ,  Hau Nguyen ,  Masamitsu Matsuura ,  Ting-Ta Yen

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

Abstract: A method includes forming a stress sensitive component on a first semiconductor die; forming a solder seal on the first semiconductor die, the solder seal extending from a first surface of the first semiconductor die, and surrounding the stress sensitive component, the solder seal having an interior surface that surrounds the stress sensitive component and having an exterior surface facing away from the stress sensitive component; flip chip mounting the first semiconductor die to a first surface of a second semiconductor die, the stress sensitive component facing the first surface of the second semiconductor die; and forming a solder joint between the solder seal and the first surface of the second semiconductor die.

公开(公告)号：US12074134B2

公开(公告)日：2024-08-27

申请号：US17364769

申请日：2021-06-30

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Mahmud Chowdhury ,  Hau Nguyen ,  Masamitsu Matsuura ,  Ting-Ta Yen

IPC: H01L23/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L24/94 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3171 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/11 ,  H01L24/16 ,  H01L25/0657 ,  H01L24/95 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11849 ,  H01L2224/16146 ,  H01L2225/06513 ,  H01L2924/182

Abstract: In a described example, an apparatus includes: a first semiconductor die with a component on a first surface; a second semiconductor die mounted on a package substrate and having a third surface facing away from the package substrate; a solder seal bonded to and extending from the first surface of the first semiconductor die flip chip mounted to the third surface of the second semiconductor die, the solder seal at least partially surrounding the stress sensitive component; a first solder joint formed between the solder seal and the third surface of the second semiconductor die; a second solder joint formed between solder at an end of the post connect and the third surface of the second semiconductor die; and a mold compound covering the second surface of the first semiconductor die, a portion of the second semiconductor die, and an outside periphery of the solder seal.