公开(公告)号：US10511848B2

公开(公告)日：2019-12-17

申请号：US15000566

申请日：2016-01-19

Applicant: Texas Instruments Incorporated

Inventor： Vivekanand Chengalvala ,  Djordje Senicic

IPC: H04N11/02 ,  H04N19/423 ,  H04N19/42 ,  H04N19/40 ,  H04N19/44 ,  H04N19/70

Abstract: An adaptive transcoder is provided that includes a shared memory containing a plurality of decoder buffers to store incoming data packets, a plurality of decoder instances to control a decoding process to generate image raw data based on the incoming data packets, and a plurality of encoder instances configured to control an encoding process to generate outgoing packets based on the image raw data; and a data processing element containing a plurality of processing cores, and a core controller. Each decoder instance is paired with an encoder instance; and each decoder buffer is associated with a decoder instance. Each decoder buffer includes a monitoring element to monitor a respective decoder buffer, and provide buffer data corresponding to the status of the decoder buffer. Each encoder instance is associated with a processing core; and the core controller uses the buffer data to associate each decoder instance with a processing core.

公开(公告)号：US20160134880A1

公开(公告)日：2016-05-12

申请号：US15000566

申请日：2016-01-19

Applicant: Texas Instruments Incorporated

Inventor： Vivekanand Chengalvala ,  Djordje Senicic

IPC: H04N19/423 ,  H04N19/44 ,  H04N19/70 ,  H04N19/40

CPC classification number: H04N19/423 ,  H04N19/40 ,  H04N19/42 ,  H04N19/44 ,  H04N19/70

Abstract: An adaptive transcoder is provided that includes a shared memory containing a plurality of decoder buffers to store incoming data packets, a plurality of decoder instances to control a decoding process to generate image raw data based on the incoming data packets, and a plurality of encoder instances configured to control an encoding process to generate outgoing packets based on the image raw data; and a data processing element containing a plurality of processing cores, and a core controller. Each decoder instance is paired with an encoder instance; and each decoder buffer is associated with a decoder instance. Each decoder buffer includes a monitoring element to monitor a respective decoder buffer, and provide buffer data corresponding to the status of the decoder buffer. Each encoder instance is associated with a processing core; and the core controller uses the buffer data to associate each decoder instance with a processing core.

Abstract translation: 提供了一种自适应代码转换器，其包括：包含多个解码器缓冲器以存储输入数据分组的共享存储器;多个解码器实例，用于控制解码过程以基于输入数据分组生成图像原始数据;以及多个编码器实例 被配置为基于所述图像原始数据来控制编码处理以生成输出分组; 以及包含多个处理核心的数据处理元件和核心控制器。 每个解码器实例与编码器实例配对; 并且每个解码器缓冲器与解码器实例相关联。 每个解码器缓冲器包括监视元件以监视相应的解码器缓冲器，并提供对应于解码器缓冲器的状态的缓冲器数据。 每个编码器实例与处理核心相关联; 并且核心控制器使用缓冲器数据将每个解码器实例与处理核心相关联。