公开(公告)号：US20250006510A1

公开(公告)日：2025-01-02

申请号：US18346164

申请日：2023-06-30

Applicant: Texas Instruments Incorporated

Inventor： Yu Fu ,  Huo Yun Duan ,  Fu Ren Pang ,  Longting Li ,  Zheng Qing Fan

IPC: H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H05K3/34

Abstract: In a described example, an example no-lead semiconductor device package includes: a die pad in a central portion of a partially etched leadframe and terminals. The terminals include a device side surface formed in an upper layer of the partially etched leadframe, and a first exterior end in the upper layer; a board side surface formed in a lower layer of the partially etched leadframe extending from the upper layer; a second exterior end in the lower layer, the second exterior end inset from the first exterior end, and an inset portion extending from the first exterior end to the second exterior end. A semiconductor die is mounted to the die pad. Mold compound covers the semiconductor die, the second exterior end of the terminals and the inset portion of the terminals are exposed from the mold compound, with the mold compound extending along sides of the terminals.