公开(公告)号：US20200027985A1

公开(公告)日：2020-01-23

申请号：US16109714

申请日：2018-08-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Purakh Raj Verma ,  Chih-Wei Su ,  Je-Min Wen

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/06 ,  H01L29/66 ,  H01L21/311 ,  H01L21/764

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first silicon layer, an insulating layer on the first silicon layer, and a second silicon layer on the insulating layer; forming a metal-oxide semiconductor (MOS) transistor on the substrate; forming an interlayer dielectric layer (ILD) on the MOS transistor; removing part of the ILD layer to form a first trench to expose the insulating layer; and performing a wet etching process through the first trench to remove part of the insulating layer for forming a first air gap under the MOS transistor.

公开(公告)号：US10529854B1

公开(公告)日：2020-01-07

申请号：US16109714

申请日：2018-08-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Purakh Raj Verma ,  Chih-Wei Su ,  Je-Min Wen

IPC: H01L29/78 ,  H01L29/786 ,  H01L21/764 ,  H01L29/66 ,  H01L21/311 ,  H01L29/06 ,  H01L21/762

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first silicon layer, an insulating layer on the first silicon layer, and a second silicon layer on the insulating layer; forming a metal-oxide semiconductor (MOS) transistor on the substrate; forming an interlayer dielectric layer (ILD) on the MOS transistor; removing part of the ILD layer to form a first trench to expose the insulating layer; and performing a wet etching process through the first trench to remove part of the insulating layer for forming a first air gap under the MOS transistor.