METHOD AND SYSTEM FOR OSCILLOSCOPE TRIGGERING

    公开(公告)号:US20180188291A1

    公开(公告)日:2018-07-05

    申请号:US15859987

    申请日:2018-01-02

    CPC classification number: G01R13/0254

    Abstract: The present invention provides a method and system for oscilloscope triggering. The power spectrum entropy threshold Gp and the singular spectrum entropy threshold Gs are obtained by calculating the averages of the power spectrum entropy Hi and the singular spectrum entropy Ei of the first a waveform data frames respectively. Then, for the waveform data frame xa+1(τ) and thereafter, If the power spectrum entropy Hi is greater than power spectrum entropy threshold Gp and the singular spectrum entropy Ei is greater than the singular spectrum entropy threshold Gs, the waveform data frame xi(τ) is an abnormal signal, the second trigger occurs, storing and displaying the waveform data frame. Thus the storage and display of abnormal signal is realized

    METHOD AND APPARATUS FOR AUTOMATICALLY ADJUSTING THE HOLD-OFF TIME OF A DSO

    公开(公告)号:US20180364282A1

    公开(公告)日:2018-12-20

    申请号:US16005763

    申请日:2018-06-12

    CPC classification number: G01R13/0254

    Abstract: The present invention provides a method and apparatus for automatically adjusting the hold-off time of a DSO based on real-time cycle measurements of the system trigger signal: obtaining a cycle sequence by measuring the system trigger signal, the maximum cycle and minimum cycle, then judging the difference of the maximum cycle and minimum cycle: if the difference is greater than a threshold set by user, setting the hold-off time to the maximum cycle, the minimum cycle or the median cycle, then returning; otherwise terminating the adjustment of the hold-off time. At this point, the hold-off time is correctly set. Therefore, the present invention reduces the complexity and time consumption of the hold-off adjustment, and allows the test signal to be quickly and stably displayed on screen of DSO, meanwhile, which makes the trigger adjustment of DSO more convenient.

    TEMPERATURE-COMPENSATED CRYSTAL OSCILLATOR BASED ON ANALOG CIRCUIT

    公开(公告)号:US20180013384A1

    公开(公告)日:2018-01-11

    申请号:US15711430

    申请日:2017-09-21

    Abstract: Disclosed is a temperature-compensated crystal oscillator based on analog circuit; a closed-loop compensation architecture determines the temperature compensation of a crystal oscillator. The power splitter divides the VCXO's current output signal with frequency f=f0+Δf into two signals, one signal to output of the TCXO and the other signal is sent to an analog frequency-voltage conversion circuit. According to the frequency of the VCXO's current output signal, the analog frequency-voltage conversion circuit produces a voltage signal V(T), which corresponds to current ambient temperature. The difference between V(T) and a reference voltage signal Vref is produced and amplified to obtain a compensation voltage signal ΔV through a voltage matching circuit. ΔV is smoothed by a filter, then sent to the voltage control terminal of the VCXO to make the VCXO generate a stable signal with desired frequency f0, to compensate the frequency of the VCXO's output signal when the ambient temperature is changed.

    METHOD FOR MEASURING THE PROPERTIES OF LIQUID BASED ON A QUARTZ CRYSTAL MICROBALANCE SENSOR
    4.
    发明申请
    METHOD FOR MEASURING THE PROPERTIES OF LIQUID BASED ON A QUARTZ CRYSTAL MICROBALANCE SENSOR 审中-公开
    用于测量基于晶体晶体微结构传感器的液体性质的方法

    公开(公告)号:US20160097743A1

    公开(公告)日:2016-04-07

    申请号:US14933648

    申请日:2015-11-05

    Abstract: The present invention provides a method for a method for measuring the properties of liquid based on a quartz crystal microbalance sensor, which employs two measurements to obtain two frequency shifts of the QCM sensor induced by two different volume of the sample liquid. The present invention creatively established the relationship between the density and viscosity of sample liquid and the frequency shifts of QCM sensor. With present invention, the density and viscosity of sample liquid can be obtained through two frequency shifts. Comparing to the conventional liquid property measurement. The measuring procedure of present invention are more simple, and the measuring results are more accurate. Moreover, the present invention consumes less volume of sample liquid, and has the features such as online, real time and quantitative.

    Abstract translation: 本发明提供了一种用于测量基于石英晶体微量天平传感器的液体性质的方法,该方法采用两次测量来获得由两个不同体积的样品液体引起的QCM传感器的两个频移。 本发明创造性地建立了样品液体的密度和粘度与QCM传感器的频移之间的关系。 通过本发明,可以通过两次频移获得样品液体的密度和粘度。 与传统的液体性能测量相比。 本发明的测量方法更简单,测量结果更准确。 此外,本发明消耗较少的样品液体量,具有在线,实时和定量等特征。

    METHOD FOR OSCILLOSCOPE 3D MAPPING IN SCAN MODE

    公开(公告)号:US20180149676A1

    公开(公告)日:2018-05-31

    申请号:US15879146

    申请日:2018-01-24

    Abstract: A method for oscilloscope 3D mapping in scan mode. The input signal is acquired using a real-time sampling rate which is Dr times higher, thus more sampling points, i.e. Dr acquired data can be obtained during the time interval between two consecutive horizontal pixels. The Dr acquired data are mapped into a same column of the screen to implement fluorescent waveform display. In addition, to realize the scanning display, a flag X is introduced into the three-dimensional database, when the screen refresh signal arrives, the first Ds acquired data are read out from the unread acquired data in FIFO memory. The three-dimensional database is updated from the flag X, which make the leftmost waveform always be the oldest waveform, the rightmost waveform always be the newest waveform. Thus the 3D mapping is realized in scan mode, letting the DSO have a fluorescent waveform display at slow time-base.

    METHOD FOR EQUIVALENT HIGH SAMPLING RATE FIR FILTERING BASED ON FPGA

    公开(公告)号:US20190080035A1

    公开(公告)日:2019-03-14

    申请号:US16163596

    申请日:2018-10-18

    Abstract: The present invention provides a method for equivalent high sampling rate FIR filtering based on FPGA, first, the coefficients h(k) of FIR filter are found by using MATLAB, multiplied by an integer and then rounded for the purpose that the rounded coefficients h(k) can be directly used into a FPGA, then the ADC's output of high data rate fs is lowered by dividing the ADC's output x(n) into M parallel data streams xi(n) of low data rate, and the M×L samples in one clock circle is obtained by delaying the M parallel data streams xi(n) simultaneously by 1, 2, . . . , L′ periods of the synchronous clock, at last, the samples yi(n) of FIR filtering output is calculated according to the samples selected from the M×L samples, and the filtered data y(n) of data rate fs is obtained by putting the samples yi(n) together in ascending order of i. Thus, the continuous FIR filtering of an ADC's output sampled with high sampling rate is realized, while the data rates before and after the FIR filtering are unchanged.

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