公开(公告)号：US10985771B2

公开(公告)日：2021-04-20

申请号：US16703828

申请日：2019-12-04

Applicant: University of Electronic Science and Technology of China

Inventor： Hua Fan ,  Chen Wang ,  Peng Lei ,  Dainan Zhang ,  Quanyuan Feng ,  Lang Feng ,  Xiaopeng Diao ,  Dagang Li ,  Kelin Zhang ,  Daqian Hu ,  Yuanjun Cen

IPC: H03M1/10 ,  H03M1/46

Abstract: A method of calibrating capacitive array of a resistor-capacitor hybrid successive approximation register analog-to-digital converter (RC-hybrid SAR ADC) that includes a high M-bit capacitor DAC and a low N-bit resistor DAC. The method includes: disposing n unit capacitors in each capacitive array of the RC-hybrid SAR ADC, wherein n=2M−1; sorting the capacitors in an ascending order according to their capacitances to form a sorted array, and selecting two capacitors Cu(n/2)*, Cu(n/2+1)* in the middle positions as a least significant bit (LSB) capacitor and a dummy capacitor, respectively; obtaining a new array by forming each capacitor through adding two capacitors which have symmetrical positions with respect to the middle position(s) in the sorted array; and sorting the new array in an ascending order, and selecting the capacitor in the middle position as a higher bit capacitor. The method improves the static and dynamic performance of the SAR ADC.