Distributed parallel processing routing

    公开(公告)号:US11875100B1

    公开(公告)日:2024-01-16

    申请号:US17339232

    申请日:2021-06-04

    Applicant: XILINX, INC.

    CPC classification number: G06F30/3947 G06F9/3555 G06F9/5061 G06F30/347

    Abstract: Examples described herein provide a non-transitory computer-readable medium storing instructions, which when executed on one or more processors, cause the one or more processors to perform operations. The operations include generating a plurality of child processes according to a number of a plurality of partitions in an integrated circuit (IC) design for an IC die, each of the plurality of child processes corresponding to and assigned to a respective one of the plurality of partitions. The operations include transmitting each of the plurality of partitions to a respective one of the plurality of child processes for routing, each of the plurality of partitions comprising a placement of components for the IC design. The operations include receiving a plurality of routings from the plurality of child processes. The operations include merging the plurality of routings into a global routing for the IC design by assembling together to form a global routing.

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