公开(公告)号：US20240020058A1

公开(公告)日：2024-01-18

申请号：US17865157

申请日：2022-07-14

Applicant: XILINX, INC.

Inventor： Ygal ARBEL ,  Martin NEWMAN ,  Arul CHINNAPPAN

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0611 ,  G06F3/0673

Abstract: A state-of-the-art memory controller and methods for using the same are disclosed. The memory controller is intended for use with dynamic random-access memory (DRAM) circuitry. In one example, a memory controller includes a reordering preprocessor circuitry coupled to a reordering scheduler circuitry. The reordering scheduler circuitry is configured to control a reordering scheduler queue, and is coupled to DRAM circuitry. The reordering preprocessor circuitry is configured to control a preprocessor queue and reorder transactions in the preprocessor queue so as to increase the DRAM circuitry performance.