公开(公告)号：US09871615B2

公开(公告)日：2018-01-16

申请号：US15278790

申请日：2016-09-28

Applicant: Xieon Networks S.à.r.l.

Inventor： Alessandro Bianciotto ,  Bernhard Spinnler ,  Antonio Napoli ,  Christina Hebebrand

IPC: H04B10/00 ,  H04B10/06 ,  H04J14/06 ,  H04B10/61 ,  H04L7/033 ,  H04L7/00

CPC classification number: H04J14/06 ,  H04B10/614 ,  H04B10/6161 ,  H04B10/6165 ,  H04L7/0029 ,  H04L7/0075 ,  H04L7/0079 ,  H04L7/0331

Abstract: Component signal values are derived from component signals and fed to at least one fixed equalizer which generates equalizer output signals. The signals are fed to phase error detectors generating phase error signals. The phase error signals are combined with further phase error signals derived by further error detectors receiving signal values from further equalizers and/or the component signal values directly from sample units.