公开(公告)号：US20250130770A1

公开(公告)日：2025-04-24

申请号：US18493233

申请日：2023-10-24

Applicant: Xilinx, Inc.

Inventor： Chinmaya Dash

IPC: G06F7/523 ,  G06F5/01 ,  G06F7/50 ,  H03K19/21

Abstract: An implementation may include a method for performing a binary multiplication including receiving a first at an input interface of a digital multiplier circuit in the computing system, receiving a second operand at the input interface of the digital multiplier circuit, generating, by the digital multiplier circuit, partial products by performing a AND operation with each of the N bits of the first operand and each of the bits of the second operand, and generating first modified partial products by modifying, by the digital multiplier circuit, most significant bits of the partial products, generating second modified partial products by modifying, by the digital multiplier circuit, one of the first modified partial product, generating, by the digital multiplier circuit, a product by summing the second modified partial products, and outputting the product from an output interface of the digital multiplier circuit.

公开(公告)号：US10387594B1

公开(公告)日：2019-08-20

申请号：US15707897

申请日：2017-09-18

Applicant: Xilinx, Inc.

Inventor： Chinmaya Dash

IPC: G06F17/50 ,  H03K19/01 ,  H03K19/17 ,  H03K19/0175 ,  H03K19/177

Abstract: An integrated circuit having programmable logic fabric, as well as system and method for computer aided design using such integrated circuit, are disclosed. This integrated circuit includes: a configurable bypassable flip-flop circuit configured to transfer information from programmable internal routing to an input bus of a programmable logic circuit; a loopback branch connected to the input bus to bypass the programmable logic circuit; and a multiplexer having a first input port connected to the loopback branch, a second input port connected to an output bus of the programmable logic circuit, and an output port connected to routing switches of the programmable internal routing. The multiplexer is configured to electrically couple either the first input port or the second input port to the output port.