公开(公告)号：US10672098B1

公开(公告)日：2020-06-02

申请号：US15946300

申请日：2018-04-05

Applicant: Xilinx, Inc.

Inventor： Cyril Chemparathy ,  Mrinal J. Sarmah ,  Hyun W. Kwon ,  Maurice Penners

IPC: G06T1/60

Abstract: Systems and method for synchronizing access to buffered data are disclosed. In such a method, video data is buffered in a frame buffer memory by a producer device. A write level indicator is provided to a synchronizer by the producer device. A read level indicator is provided to the synchronizer by a consumer device. The synchronizer compares the write level indicator with the read level indicator to determine a difference. The consumer device is informed by the synchronizer when the difference meets a sub-frame threshold. The consumer device reads the buffered data from the frame buffer memory on a sub-frame-by-sub-frame basis responsive to the informing.