公开(公告)号：US10169264B1

公开(公告)日：2019-01-01

申请号：US15639752

申请日：2017-06-30

Applicant: Xilinx, Inc.

Inventor： Michelle E. Zeng ,  Subodh Kumar ,  Uma Durairajan ,  Weiguang Lu ,  Karthy Rajasekharan ,  Kumar Rahul

IPC: G06F13/16 ,  H03K19/177 ,  G06F3/06 ,  G06F13/40 ,  G11C7/10 ,  G01R31/3185

Abstract: In an example, a memory circuit in a programmable integrated circuit (IC) includes: a control port and a clock port; a configurable random access memory (RAM) having a control input and a clock input; input multiplexer logic coupled to the control input and the clock input; and a state machine coupled to the input multiplexer logic and configuration logic of the programmable IC, the state machine configured to: in response to being enabled by the configuration logic, control the input multiplexer logic to switch a connection of the control input from the control port to the state machine and, subsequently, switch a connection of the clock input from the clock port to a configuration clock source; and in response to being disabled by the configuration logic, control the input multiplexer logic to switch the connection of the clock input from the configuration clock source to the clock port and, subsequently, switch the connection of the control input from the state machine to the control port.

公开(公告)号：US10108376B1

公开(公告)日：2018-10-23

申请号：US15587294

申请日：2017-05-04

Applicant: Xilinx, Inc.

Inventor： Michelle E. Zeng ,  Subodh Kumar ,  Uma Durairajan ,  Weiguang Lu ,  Hsiao H. Chen

IPC: G11C16/04 ,  G06F3/06 ,  G06F11/10

Abstract: Circuits and methods for initializing a memory. Each row of the memory includes data bits and associated parity bits. A write buffer contains bit values for initializing the memory, and a control circuit performs a first set of write operations that write values from the write buffer to the data bits of the memory without writing values to the associated parity bits. The write buffer performs a second set of write operations that write values from the write buffer to the parity bits associated with the data bits without writing data to the data bits.