公开(公告)号：US12032932B2

公开(公告)日：2024-07-09

申请号：US17811660

申请日：2022-07-11

Applicant: Xilinx, Inc.

Inventor： Shantanu Mishra ,  Hemant Kashyap ,  Uday Kyatham ,  Mahesh Attarde ,  Amit Kasat Kasat

IPC: G06F8/41

CPC classification number: G06F8/434 ,  G06F8/44

Abstract: Compiling a high-level synthesis circuit design for simulation includes analyzing, using computer hardware, a kernel specified in a high-level language to detect pointers therein. A determination is made as to which of the pointers are global address space pointers referencing a global address space. The kernel is instrumented by replacing accesses in the kernel to the global address space with calls to wrapper functions for performing the accesses. A simulation kernel is generated that specifies an assembly language version of the kernel as instrumented.

公开(公告)号：US20240012629A1

公开(公告)日：2024-01-11

申请号：US17811660

申请日：2022-07-11

Applicant: Xilinx, Inc.

Inventor： Shantanu Mishra ,  Hemant Kashyap ,  Uday Kyatham ,  Mahesh Attarde ,  Amit Kasat Kasat

IPC: G06F8/41

CPC classification number: G06F8/434 ,  G06F8/44

Abstract: Compiling a high-level synthesis circuit design for simulation includes analyzing, using computer hardware, a kernel specified in a high-level language to detect pointers therein. A determination is made as to which of the pointers are global address space pointers referencing a global address space. The kernel is instrumented by replacing accesses in the kernel to the global address space with calls to wrapper functions for performing the accesses. A simulation kernel is generated that specifies an assembly language version of the kernel as instrumented.