公开(公告)号：US12015486B2

公开(公告)日：2024-06-18

申请号：US17418773

申请日：2019-09-27

Applicant: ZTE CORPORATION

Inventor： Yang Li ,  Lilin Wang ,  Xueqiang Wu ,  Degang Zhang ,  Jianan Wang

IPC: H04L1/1607 ,  H04L1/00

CPC classification number: H04L1/1607 ,  H04L1/005 ,  H04L1/0057 ,  H04L1/0061

Abstract: Disclosed are a data retransmission decoding method, apparatus and system, and a communication device. The method includes: obtaining retransmitted data to be decoded, the retransmitted data to be decoded including a code block to be decoded (S102); according to stored check state information of a previously decoded code block, judging whether the code block to be decoded includes a target code block required to be decoded again (S104); and if the code block to be decoded includes the target code block required to be decoded again, merging and decoding a currently stored first code block and the target code block based on a predetermined decoding parameter (S106), wherein the first code block is a code block corresponding to the target code block.

公开(公告)号：US10778359B2

公开(公告)日：2020-09-15

申请号：US15744458

申请日：2014-12-12

Applicant: ZTE Corporation

Inventor： Lilin Wang ,  Juan Wan ,  Yangfeng Wang ,  Xiaoming Fu

IPC: H04J3/06 ,  H04L7/04

Abstract: A time synchronization method, a programmable logic device, a single board and a network element are provided. In the method, a programmable logic device receives a request message from a terminal, generates a time synchronization message according to the request message, and sends the time synchronization message to the terminal.

公开(公告)号：US09900120B2

公开(公告)日：2018-02-20

申请号：US15321736

申请日：2014-11-03

Applicant: ZTE CORPORATION

Inventor： Lilin Wang ,  Shengnan Yan ,  Yangfeng Wang

IPC: H04J3/06

CPC classification number: H04J3/0697 ,  G06F1/12 ,  G06F1/14 ,  G06F9/4881 ,  H04J3/0667

Abstract: The present disclosure provides a clock synchronization method and a clock synchronization apparatus. Herein the method includes: a physical layer device acquires a synchronization message used for a device to be synchronized to implement clock synchronization; and the physical side device transmits the synchronization message to the device to be synchronized. By means of the abovementioned technical solution provided by the present disclosure, the problems of small user capacity of the load and high synchronization cost resulted from the clock synchronization method in existing technologies are solved, the insufficient user capacity of the load caused by the limit of the CPU architecture is avoided, and the bandwidth resource of the Ethernet is utilized to the maximum extent.