公开(公告)号：US20130293399A1

公开(公告)日：2013-11-07

申请号：US13855030

申请日：2013-04-02

Applicant: GENERALPLUS TECHNOLOGY INC.

Inventor： Tung-Tsai LIAO ,  Hsin-Chou LEE ,  Hsin-Lung LAI

IPC: H03M11/20

CPC classification number: H03M11/20 ,  H03M11/08

Abstract: An ultra-low power wakeup circuit device includes a keyboard, a key scan circuit, a storage unit, and a comparator unit. The key scan circuit sequentially outputs scanning signals from the first scan line to N-th scan line for acquiring N key scan data. The key scan circuit performs an XOR operation on the N key scan data to generate a current key scan data. The storage unit is connected to the key scan circuit for receiving the current key scan data and storing the current key scan data as a previous key scan data. The comparator unit is connected to the key scan circuit and the storage unit for comparing the current key scan data with the previous key scan data.When the current key scan data is different from the previous key scan data, the comparator unit generates a wakeup signal.

Abstract translation: 超低功率唤醒电路装置包括键盘，键扫描电路，存储单元和比较器单元。 按键扫描电路顺序输出从第一扫描线到第N扫描线的扫描信号，以获取N个键扫描数据。 键扫描电路对N键扫描数据执行XOR操作，以生成当前键扫描数据。 存储单元连接到键扫描电路，用于接收当前键扫描数据并将当前键扫描数据存储为先前的键扫描数据。 比较器单元连接到键扫描电路和存储单元，用于将当前键扫描数据与先前的键扫描数据进行比较。 当当前的键扫描数据与先前的键扫描数据不同时，比较器单元产生唤醒信号。

公开(公告)号：US08085613B2

公开(公告)日：2011-12-27

申请号：US12729661

申请日：2010-03-23

Applicant: Ming-Hung Tsai ,  Lee Hsin Chou

Inventor： Ming-Hung Tsai ,  Lee Hsin Chou

IPC: G11C5/14

CPC classification number: G11C5/141 ,  G11C5/143 ,  G11C11/417

Abstract: In step S508, it is determined whether or not a power low signal SRC_LOSS outputted from the data latch is change. Generally Speaking, the power low signal SRC_LOSS outputted from the data latch would be changed according to the state of the power voltage of the power input terminal. When the power voltage of the power input terminal is charged/discharged to the common voltage, the power low signal SRC_LOSS outputted from the data latch may be changed from the logical high voltage to the logical low voltage or from the original logical low voltage to the logical high voltage. Since the mention above is design of selectiveness, the detailed description is omitted. When the determination is positive, the step S509 is performed. When the determination is negative, the step S511 is performed to re-detect.

Abstract translation: 在步骤S508中，确定从数据锁存器输出的功率低信号SRC_LOSS是否改变。 一般来说，从数据锁存器输出的功率低信号SRC_LOSS将根据电源输入端子的电源电压的状态而改变。 当电源输入端子的电源电压被充放电到公共电压时，从数据锁存器输出的功率低信号SRC_LOSS可以从逻辑高电压变为逻辑低电压或从原始逻辑低电压变为 逻辑高电压。 由于上述是选择性的设计，因此省略其详细描述。 当确定为肯定时，执行步骤S509。 当确定为否定时，执行步骤S511以重新检测。

公开(公告)号：US08081774B2

公开(公告)日：2011-12-20

申请号：US12068145

申请日：2008-02-04

Applicant: Ming-Hung Tsai ,  Tung-Tsai Liao

Inventor： Ming-Hung Tsai ,  Tung-Tsai Liao

IPC: H04R5/00

CPC classification number: H03F1/305

Abstract: A circuit for eliminating pop sounds at power on and off by a moderate waveform, which includes a switch, a feedback network, an operational amplifier and an output network. When power-on, a first input terminal of the switch is connected to a low voltage, and an output terminal of the output network provides an operating DC bias which is gradually increased. When power-off, the first input terminal of the switch is connected to a reference voltage, and the output terminal of the output network provides an operating DC bias which is gradually reduced.

Abstract translation: 一种用于通过包括开关，反馈网络，运算放大器和输出网络的中等波形来消除通电和关断的流行声音的电路。 当通电时，开关的第一输入端子连接到低电压，输出网络的输出端子提供逐渐增加的工作DC偏压。 当断电时，开关的第一输入端子连接到参考电压，输出网络的输出端提供逐渐减小的工作DC偏置。

公开(公告)号：US07859272B2

公开(公告)日：2010-12-28

申请号：US11984412

申请日：2007-11-16

Applicant: Tung-Tsai Liao ,  Li Sheng Lo

Inventor： Tung-Tsai Liao ,  Li Sheng Lo

IPC: G01R27/26

CPC classification number: H03K17/955 ,  H03K2217/96073

Abstract: A method for measuring a speed of a conductor slipping through a capacitive sensor. The method includes: sampling a capacitance of a sensing electrode at each preset time; determining a first threshold value and a second threshold value according to a peak value of the capacitance when the capacitance achieves the peak value; and determining the speed of the conductor slipping through the capacitive sensor by the first period and the second period, wherein the first period is defined as a period of time ranging from the time when the capacitance reaches the first threshold value to the time when the capacitance reaches the peak value and the second period is defined as a period of time ranging from the time when the capacitance reaches the peak value to the time when the capacitance reaches the second threshold value.

Abstract translation: 一种用于测量通过电容式传感器滑动的导体的速度的方法。 该方法包括：在每个预设时间采样感测电极的电容; 当电容达到峰值时，根据电容的峰值确定第一阈值和第二阈值; 以及确定所述导体在所述电容传感器中滑动所述第一周期和所述第二周期的速度，其中所述第一周期被定义为从所述电容达到所述第一阈值的时间到所述电容 达到峰值，第二周期定义为从电容达到峰值时刻到电容达到第二阈值时的时间段。

公开(公告)号：US20100310012A1

公开(公告)日：2010-12-09

申请号：US12707332

申请日：2010-02-17

Applicant: Chia-Sheng HSU

Inventor： Chia-Sheng HSU

IPC: H04L27/00 ,  H04L7/00

CPC classification number: H04L7/027 ,  H04L27/14

Abstract: The invention relates to methods for adaptive clock reconstruction and decoding in audio frequency. The method includes the steps of: receiving a modulated signal, wherein the modulated signal is modulated by RC-FSK (Return to Carrier Frequency Shifting Keying); performing a spectrum analysis to the modulated signal to obtain a plurality of frequency envelopes; storing the frequency envelopes; searching the peak values of the frequency envelopes and the time points corresponding to the peak values to modify an estimated period; and generating a clock period for the RC-FSK demodulation and a clock phase for the RC-FSK demodulation according to the estimated period.

Abstract translation: 本发明涉及音频自适应时钟重建和解码方法。 该方法包括以下步骤：接收调制信号，其中调制信号由RC-FSK调制（返回到载波频移键控）。 对调制信号进行频谱分析以获得多个频率包络; 存储频率包络; 搜索频率包络的峰值和对应于峰值的时间点来修改估计周期; 并根据估计周期产生RC-FSK解调的时钟周期和RC-FSK解调的时钟相位。

公开(公告)号：US20090045821A1

公开(公告)日：2009-02-19

申请号：US11984413

申请日：2007-11-16

Applicant: Tung-Tsai Liao ,  Li Sheng Lo

Inventor： Tung-Tsai Liao ,  Li Sheng Lo

IPC: G01R27/26

CPC classification number: H03K17/9622 ,  H03K2017/9602 ,  H03K2217/960705 ,  H03K2217/960715

Abstract: A capacitive sensor includes a sensing electro, control unit, first and second comparator wherein the sensing electro includes a first and a second conduct ports. A positive input terminal of the first comparator and a negative input terminal of the second comparator are coupled to the first conduct port. A positive input terminal of the second comparator and a negative input terminal of the first comparator are coupled to the second conduct port. The first and second comparators respectively output first and second comparing signals according to voltages of the positive and the negative terminals thereof. The control unit charges the first conduct port and discharges the second conduct port when the first and second comparing signals correspondingly are in first and second logic states. The control unit is operable on the contrary when the first and second comparing signals are in opposition to the abovementioned description.

Abstract translation: 电容传感器包括感测电控制单元第一和第二比较器，其中感测电子包括第一和第二导电端口。 第一比较器的正输入端和第二比较器的负输入端耦合到第一导通端口。 第二比较器的正输入端和第一比较器的负输入端耦合到第二导通端口。 第一和第二比较器分别根据其正极和负极的电压分别输出第一和第二比较信号。 当第一和第二比较信号相应地处于第一和第二逻辑状态时，控制单元对第一导电端口充电并放电第二导通端口。 相反，当第一和第二比较信号与上述描述相反时，控制单元可操作。