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公开(公告)号：US20220310722A1
公开(公告)日：2022-09-29
申请号：US17414332
申请日：2020-12-29
Inventor： Linhong HAN , Yi ZHANG , Guangzhou ZHAO , Yiyang ZHANG , Yuqing YANG , Tingliang LIU , Pengfei YU , Yang ZHOU , Qun MA , Xiping LI , Shikai QIN , Weiyun HUANG , Yue LONG
Abstract: Provided are a display motherboard, a preparation method thereof, a display substrate and a display device. The display motherboard includes a plurality of display substrate regions and a cutting region located at a periphery of each of the plurality of display substrate regions; the display motherboard includes a driving structure layer arranged in each of the plurality of display substrate regions and a marking structure layer arranged in each cutting region, wherein the marking structure layer includes a cutting mark layer; and a planarization layer arranged on the driving structure layer and the marking structure layer, and covering the marking structure layer.
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Patent Agency Ranking
公开(公告)号：US20220181426A1
公开(公告)日：2022-06-09
申请号：US17437033
申请日：2021-01-20
Inventor： Gong CHEN , Yuqing YANG , Yiyang ZHANG , Zheng BAO , Zhiyong YANG , Yang ZHOU , Huijun LI , Tingliang LIU , Huijuan YANG , Xin ZHANG , Meng ZHANG , Xiaofeng JIANG , Hao ZHANG , Yu WANG
IPC: H01L27/32
Abstract: The present disclosure provides an array substrate, a method for manufacturing an array substrate and a display panel. The array substrate includes: a base having a display area, a peripheral area surrounding the display area, and a visible area located between the display area and the peripheral area; a plurality of voltage signal lines disposed on the base; a metal strip disposed on the base, the voltage signal lines are coupled to the metal strip, at least a portion of the metal strip is located in the visible area, and the portion of the metal strip located in the visible area is provided with an opening.
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公开(公告)号：US20220115465A1
公开(公告)日：2022-04-14
申请号：US17280130
申请日：2020-05-09
Inventor： Huijuan YANG , Tingliang LIU , Tinghua SHANG , Yang ZHOU , Pengfei YU , Yi ZHANG , Junxi WANG
IPC: H01L27/32 , H01L51/56 , H01L23/544
Abstract: Provided are a display panel, a manufacturing method thereof, and a display device. The display panel includes an alignment mark region arranged within a flat region of a peripheral region of the display panel. The peripheral region is a region of the display panel other than an active area of the display panel. An alignment mark pattern is arranged within the alignment mark region, and/or at least one film layer within the alignment mark region is hollowed out.
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公开(公告)号：US20210320156A1
公开(公告)日：2021-10-14
申请号：US17274229
申请日：2020-07-31
Inventor： Tinghua SHANG , Yang ZHOU , Shun ZHANG , Huijuan YANG , Yi ZHANG , Ling SHI , Yao HUANG
IPC: H01L27/32
Abstract: A display substrate and a display device are provided. The display substrate includes sub-pixels including a light emitting element and a pixel circuit, the light emitting element includes a second electrode including a main body electrode. The sub-pixels include a first color sub-pixel which includes a first connecting portion. In the first color sub-pixel, the connecting electrode is connected with the first connecting portion through a first via hole, and the first connecting portion is electrically connected with the pixel circuit through a first connecting hole; and the first via hole and the first connecting hole are not overlapped with the main body electrode, and orthographic projections of the first via hole and the first connection hole on a first straight line extending in an extension direction of the data line are overlapped.
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95.发明申请公开(公告)号：US20210241706A1
公开(公告)日：2021-08-05
申请号：US16650593
申请日：2019-04-02
Abstract: Provided is shift register unit, a gate driving circuit, and a display apparatus. The shift register unit includes an input-sub-circuit, having a first terminal connected to an input signal terminal and a second terminal connected to a terminal of a first control signal; a first output sub-circuit, having a first terminal connected to a third terminal of the input sub-circuit, a second terminal connected to a terminal of a second control signal, and a third terminal connected to a first output terminal; a phase inversion control sub-circuit, having a first terminal connected to the first output terminal, a second terminal connected to a terminal of a third control signal; and a second output sub-circuit, having a first terminal connected to the first output terminal, a second terminal connected to a third terminal of the phase inversion control sub-circuit, and a third terminal connected to a second output terminal.
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公开(公告)号：US20200266256A1
公开(公告)日：2020-08-20
申请号：US16713977
申请日：2019-12-13
Inventor： Shun ZHANG , Linhong HAN , Yang ZHOU , Mengmeng DU , Yue TENG
IPC: H01L27/32
Abstract: The present disclosure relates to an array substrate, manufacturing method thereof, and a display panel. The array substrate includes a substrate, at least a first top gate TFT and at least a first bottom gate TFT disposed on the substrate and located in each sub-pixel region; a gate of the first top gate TFT and a gate of the first bottom gate TFT are formed in a same layer with same material, an active layer pattern of the first top gate TFT and an active layer pattern of the first bottom gate TFT are respectively arranged on two sides of the gate, and orthographic projections of the active layer pattern of the first top gate TFT and the active layer pattern of the first bottom gate TFT on the substrate are spaced from each other in a first direction.
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