公开(公告)号：US20140367826A1

公开(公告)日：2014-12-18

申请号：US13916669

申请日：2013-06-13

Applicant: GLOBALFOUNDRIES, INC. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hsueh-Chung Chen ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Ailian Zhao

IPC: H01L21/768 ,  H01L23/525

CPC classification number: H01L23/5256 ,  H01L21/76888 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A wafer chip and a method of designing the chip is disclosed. A first fuse is formed having a first critical dimension and a second fuse having a second critical dimension are formed in a layer of the chip. A voltage may be applied to burn out at least one of the first fuse and the second fuse. The first critical dimension of the first fuse may result from applying a first mask to the layer and applying light having a first property to the mask. The second critical dimension of the second fuse may result from applying a second mask to the layer and applying light having a second property to the mask.

Abstract translation: 公开了晶片芯片和芯片的设计方法。 形成具有第一临界尺寸的第一熔丝，并且在芯片的层中形成具有第二临界尺寸的第二熔丝。 可以施加电压以烧尽第一保险丝和第二保险丝中的至少一个。 第一保险丝的第一关键尺寸可以是将第一掩模施加到该层并且将具有第一特性的光施加到掩模。 第二保险丝的第二关键尺寸可以是将第二掩模应用于该层并且将具有第二特性的光施加到掩模。