Abstract:
A plasma display panel (PDP) and driving method that includes a floating reset process. A number of subfields are generated from input video signals, and subfield data for each subfield are output. A first voltage is applied to the first electrode according to sustain information to cause a discharge in a first discharge space, and the first electrode is floated during a period which corresponds to subfield data of a previous subfield. During this process, the floating time is controlled according to the number of addressed cells called for in previous subfield data.
Abstract:
A method for driving a panel includes classifying cells on the panel into a plurality of cell groups and performing an addressing and a sustain discharge on cells included in each of the cell groups using address electrodes, scan electrodes, and common electrodes on the panel; dividing a frame period into a plurality of subfields, allocating different gray scales to the plurality of subfields, respectively, and selectively driving the subfields to represent gradation of visible brightness of the cells on the panel; and sequentially performing an address period and a sustain period on the cell groups in at least one subfield. After the address period is performed on cells included in a cell group, the sustain period is performed on the cells included in the cell group. After the sustain period is completed on one cell group, the address period is performed on another cell group. While the sustain period is performed on one cell group, the sustain period may be selectively performed on other cell groups on which the address period has been performed. Bias voltages applied to the common electrodes while the address period is sequentially performed on the cell groups are different among the cell groups.
Abstract:
A panel capacitor is formed by a scan electrode and a sustain electrode. The voltage at the panel capacitor is reduced by turning on a transistor coupled between the scan electrode and the capacitor. As a result, the voltage within the panel capacitor exceeds the discharge firing voltage to discharge the panel capacitor. When the gate voltage of the transistor is reduced by an RC circuit, the transistor is turned off, and the scan electrode is floated. A discharge is then steeply quenched, and wall charges are finely controlled. Next, the above-noted operation is repeated by turning on the transistor.